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      1 /*	$Id: at91rm9200bus.c,v 1.4 2023/04/21 15:04:47 skrll Exp $	*/
      2 
      3 #include <sys/cdefs.h>
      4 __KERNEL_RCSID(0, "$NetBSD: at91rm9200bus.c,v 1.4 2023/04/21 15:04:47 skrll Exp $");
      5 
      6 #include <sys/types.h>
      7 #include <sys/param.h>
      8 #include <sys/systm.h>
      9 #include <sys/kernel.h>
     10 #include <sys/time.h>
     11 #include <sys/device.h>
     12 #include <uvm/uvm_extern.h>
     13 
     14 #include <arm/at91/at91rm9200busvar.h>
     15 
     16 const struct at91bus_machdep at91rm9200bus = {
     17 	at91rm9200bus_init,
     18 	at91rm9200bus_attach_cn,
     19 	at91rm9200bus_devmap,
     20 
     21 	/* clocking support: */
     22 	at91rm9200bus_peripheral_clock,
     23 
     24 	/* PIO support: */
     25 	at91rm9200bus_pio_port,
     26 	at91rm9200bus_gpio_mask,
     27 
     28 	/* interrupt handling support: */
     29 	at91rm9200bus_intr_init,
     30 	at91rm9200bus_intr_establish,
     31 	at91rm9200bus_intr_disestablish,
     32 	at91rm9200bus_intr_poll,
     33 	at91rm9200bus_intr_dispatch,
     34 
     35 	/* configuration */
     36 	at91rm9200bus_peripheral_name,
     37 	at91rm9200bus_search_peripherals
     38 };
     39 
     40 void at91rm9200bus_init(struct at91bus_clocks *clocks)
     41 {
     42 	pmap_devmap_register(at91_devmap());
     43 	at91pmc_get_clocks(clocks);
     44 }
     45 
     46 const struct pmap_devmap *at91rm9200bus_devmap(void)
     47 {
     48 	static const struct pmap_devmap devmap[] = {
     49 	    DEVMAP_ENTRY(
     50 		AT91RM9200_APB_VBASE,
     51 		AT91RM9200_APB_HWBASE,
     52 		AT91RM9200_APB_SIZE
     53 	    ),
     54 	    DEVMAP_ENTRY_END
     55 	};
     56 
     57 	return devmap;
     58 }
     59 
     60 void at91rm9200bus_peripheral_clock(int pid, int enable)
     61 {
     62 	switch (pid) {
     63 	case PID_UHP:
     64 		if (enable)
     65 			PMCREG(PMC_SCER) = PMC_SCSR_UHP;
     66 		else
     67 			PMCREG(PMC_SCDR) = PMC_SCSR_UHP;
     68 		break;
     69 	}
     70 	at91pmc_peripheral_clock(pid, enable);
     71 }
     72 
     73 at91pio_port at91rm9200bus_pio_port(int pid)
     74 {
     75 	switch (pid) {
     76 	case PID_PIOA:	return AT91_PIOA;
     77 	case PID_PIOB:	return AT91_PIOB;
     78 	case PID_PIOC:	return AT91_PIOC;
     79 	case PID_PIOD:	return AT91_PIOD;
     80 	default:		panic("%s: pid %d not valid", __FUNCTION__, pid);
     81 	}
     82 
     83 }
     84 
     85 uint32_t at91rm9200bus_gpio_mask(int pid)
     86 {
     87 	return 0xFFFFFFFFUL;
     88 }
     89 
     90 const char *at91rm9200bus_peripheral_name(int pid)
     91 {
     92 	switch (pid) {
     93 	case PID_FIQ:	return "FIQ";
     94 	case PID_SYSIRQ:return "SYS";
     95 	case PID_PIOA:	return "PIOA";
     96 	case PID_PIOB:	return "PIOB";
     97 	case PID_PIOC:	return "PIOC";
     98 	case PID_PIOD:	return "PIOD";
     99 	case PID_US0:	return "USART0";
    100 	case PID_US1:	return "USART1";
    101 	case PID_US2:	return "USART2";
    102 	case PID_US3:	return "USART3";
    103 	case PID_MCI:	return "MCI";
    104 	case PID_UDP:	return "UDP";
    105 	case PID_TWI:	return "TWI";
    106 	case PID_SPI:	return "SPI";
    107 	case PID_SSC0:	return "SSC0";
    108 	case PID_SSC1:	return "SSC1";
    109 	case PID_SSC2:	return "SSC2";
    110 	case PID_TC0:	return "TC0";
    111 	case PID_TC1:	return "TC1";
    112 	case PID_TC2:	return "TC2";
    113 	case PID_TC3:	return "TC3";
    114 	case PID_TC4:	return "TC4";
    115 	case PID_TC5:	return "TC5";
    116 	case PID_UHP:	return "UHP";
    117 	case PID_EMAC:	return "EMAC";
    118 	case PID_IRQ0:	return "IRQ0";
    119 	case PID_IRQ1:	return "IRQ1";
    120 	case PID_IRQ2:	return "IRQ2";
    121 	case PID_IRQ3:	return "IRQ3";
    122 	case PID_IRQ4:	return "IRQ4";
    123 	case PID_IRQ5:	return "IRQ5";
    124 	case PID_IRQ6:	return "IRQ6";
    125 	default:	panic("%s: invalid pid %d", __FUNCTION__, pid);
    126 	}
    127 }
    128 
    129 void at91rm9200bus_search_peripherals(device_t self,
    130 				   device_t (*found_func)(device_t, bus_addr_t, int))
    131 {
    132 	static const struct {
    133 		bus_addr_t	addr;
    134 		int		pid;
    135 	} table[] = {
    136 		{AT91RM9200_PMC_BASE,		-1},
    137 		{AT91RM9200_AIC_BASE,		-1},
    138 		{AT91RM9200_ST_BASE,		PID_SYSIRQ},
    139 		{AT91RM9200_TC0_BASE,		PID_TC0},
    140 		{AT91RM9200_TC1_BASE,		PID_TC1},
    141 		{AT91RM9200_TC2_BASE,		PID_TC2},
    142 		{AT91RM9200_TC3_BASE,		PID_TC3},
    143 		{AT91RM9200_TC4_BASE,		PID_TC4},
    144 		{AT91RM9200_TC5_BASE,		PID_TC5},
    145 		{AT91RM9200_DBGU_BASE,		PID_SYSIRQ},
    146 		{AT91RM9200_PIOA_BASE,		PID_PIOA},
    147 		{AT91RM9200_PIOB_BASE,		PID_PIOB},
    148 		{AT91RM9200_PIOC_BASE,		PID_PIOC},
    149 		{AT91RM9200_PIOD_BASE,		PID_PIOD},
    150 		{AT91RM9200_USART0_BASE,	PID_US0},
    151 		{AT91RM9200_USART1_BASE,	PID_US1},
    152 		{AT91RM9200_USART2_BASE,	PID_US2},
    153 		{AT91RM9200_USART3_BASE,	PID_US3},
    154 		{AT91RM9200_SSC0_BASE,		PID_SSC0},
    155 		{AT91RM9200_SSC1_BASE,		PID_SSC1},
    156 		{AT91RM9200_SSC2_BASE,		PID_SSC2},
    157 		{AT91RM9200_TWI_BASE,		PID_TWI},
    158 		{AT91RM9200_SPI_BASE,		PID_SPI},
    159 		{AT91RM9200_EMAC_BASE,		PID_EMAC},
    160 		{AT91RM9200_UHP_BASE,		PID_UHP},
    161 		{AT91RM9200_UDP_BASE,		PID_UDP},
    162 		{AT91RM9200_MCI_BASE,		PID_MCI},
    163 		{AT91RM9200_RTC_BASE,		PID_SYSIRQ},
    164 		{0, 0}
    165 	};
    166 	int i;
    167 
    168 	for (i = 0; table[i].addr; i++)
    169 		(*found_func)(self, table[i].addr, table[i].pid);
    170 }
    171 
    172