| /src/sys/dev/scsipi/ |
| scsi_scanner.h | 85 u_int8_t bits_per_pixel; member in struct:scsi_window_data
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/ |
| amdgpu_dce110_mem_input_v.c | 536 enum bits_per_pixel { enum in function:get_dvmm_hw_setting
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/ |
| amdgpu_dcn20_dsc.c | 164 REG_GET(DSCC_PPS_CONFIG1, BITS_PER_PIXEL, &s->dsc_bytes_per_pixel);
185 config->dc_dsc_cfg.bits_per_pixel,
186 config->dc_dsc_cfg.bits_per_pixel / 16,
187 ((config->dc_dsc_cfg.bits_per_pixel % 16) * 10000) / 16);
282 int bits_per_pixel = pps->bits_per_pixel; local in function:dsc_log_pps
292 DC_LOG_DSC("\tbits_per_pixel %d (%d.%04d)", bits_per_pixel, bits_per_pixel / 16, ((bits_per_pixel % 16) * 10000) / 16);
349 ASSERT(96 <= dsc_cfg->dc_dsc_cfg.bits_per_pixel && dsc_cfg->dc_dsc_cfg.bits_per_pixel <= 0x3ff); // 6.0 <= bits_per_pixel <= 63.937
[all...] |
| /src/sys/external/bsd/drm2/dist/include/drm/ |
| drm_dsc.h | 128 * @bits_per_pixel:
129 * Target bits per pixel with 4 fractional bits, bits_per_pixel << 4
131 u16 bits_per_pixel; member in struct:drm_dsc_config
321 * compressed BPP bits_per_pixel[9:0] syntax element.
335 * the compressed BPP bits_per_pixel[9:0] element.
|
| /src/sys/external/bsd/drm2/dist/drm/vboxvideo/ |
| vboxvideo.h | 288 u16 bits_per_pixel; member in struct:vbva_infoscreen
|
| /src/sys/dev/pci/ |
| machfb.c | 123 int bits_per_pixel; member in struct:mach64_softc
697 sc->bits_per_pixel = 8;
703 (sc->stride * (sc->bits_per_pixel / 8)) - 1;
715 sc->bits_per_pixel);
828 ri->ri_depth = sc->bits_per_pixel;
907 if (sc->bits_per_pixel == 8)
1087 switch (sc->bits_per_pixel) {
1179 if (sc->bits_per_pixel == 24)
1236 switch (sc->bits_per_pixel) {
1264 offset = ((x + y * sc->stride) * (sc->bits_per_pixel >> 3)) >> 3
[all...] |
| /src/sys/external/mit/xen-include-public/dist/xen/include/public/ |
| xen.h | 911 uint16_t bits_per_pixel; member in struct:dom0_vga_console_info::__anon457d4c9c060a::__anon457d4c9c0808
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/ |
| dc_hw_types.h | 707 uint32_t bits_per_pixel; /* DSC target bitrate in 1/16 of bpp (e.g. 128 -> 8bpp) */ member in struct:dc_dsc_config
|
| /src/sys/external/bsd/drm2/dist/drm/i915/display/ |
| intel_dp.c | 516 u32 bits_per_pixel, max_bpp_small_joiner_ram; local in function:intel_dp_dsc_get_output_bpp
525 bits_per_pixel = (link_clock * lane_count * 8) /
527 DRM_DEBUG_KMS("Max link bpp: %u\n", bits_per_pixel);
538 bits_per_pixel = min(bits_per_pixel, max_bpp_small_joiner_ram);
541 if (bits_per_pixel < valid_dsc_bpp[0]) {
543 bits_per_pixel, valid_dsc_bpp[0]);
549 if (bits_per_pixel < valid_dsc_bpp[i + 1])
552 bits_per_pixel = valid_dsc_bpp[i];
558 return bits_per_pixel << 4
[all...] |
