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    Searched defs:bpp (Results 1 - 25 of 63) sorted by relevancy

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  /src/sys/arch/hpc/stand/hpcboot/
framebuffer.cpp 49 // get current bpp.
51 int bpp = GetDeviceCaps(hdc, BITSPIXEL); local in function:FrameBufferInfo::FrameBufferInfo
61 if (tab->bpp == bpp) {
82 _default.bpp = bpp;
100 switch(_fb->bpp) {
framebuffer.h 36 int bpp, width, height, linebytes; member in struct:FrameBufferInfo::framebuffer_info
52 int bpp(void) { return _fb->bpp; } function in class:FrameBufferInfo
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dsc/
amdgpu_rc_calc_dpi.c 114 float bpp = ((float) pps->bits_per_pixel / 16.0); local in function:dscc_compute_dsc_parameters
121 double d_bytes_per_pixel = dsc_ceil(bpp * slice_width / 8.0) / slice_width;
129 /* in native_422 or native_420 modes, the bits_per_pixel is double the target bpp
133 bpp /= 2.0;
135 calc_rc_params(&rc, mode, bpc, bpp, slice_width, slice_height, pps->dsc_version_minor);
rc_calc.h 76 float bpp; member in struct:qp_entry
82 void calc_rc_params(struct rc_params *rc, enum colour_mode cm, enum bits_per_comp bpc, float bpp, int slice_width, int slice_height, int minor_version);
  /src/sys/external/bsd/drm2/dist/drm/i915/display/
intel_dsi.c 16 int bpp = mipi_dsi_pixel_format_to_bpp(intel_dsi->pixel_format); local in function:intel_dsi_bitrate
18 if (WARN_ON(bpp < 0))
19 bpp = 16;
21 return intel_dsi->pclk * bpp / intel_dsi->lane_count;
vlv_dsi_pll.c 52 u32 bpp = mipi_dsi_pixel_format_to_bpp(fmt); local in function:dsi_clk_from_pclk
56 dsi_clk_khz = DIV_ROUND_CLOSEST(pclk * bpp, lane_count);
264 int bpp = mipi_dsi_pixel_format_to_bpp(intel_dsi->pixel_format); local in function:vlv_dsi_get_pclk
318 pclk = DIV_ROUND_CLOSEST(dsi_clock * intel_dsi->lane_count, bpp);
331 int bpp = mipi_dsi_pixel_format_to_bpp(intel_dsi->pixel_format); local in function:bxt_dsi_get_pclk
339 pclk = DIV_ROUND_CLOSEST(dsi_clk * intel_dsi->lane_count, bpp);
intel_dp_mst.c 60 int bpp, slots = -EINVAL; local in function:intel_dp_mst_compute_link_config
65 for (bpp = limits->max_bpp; bpp >= limits->min_bpp; bpp -= 2 * 3) {
66 crtc_state->pipe_bpp = bpp;
  /src/usr.sbin/installboot/arch/
landisk.c 68 struct landisk_boot_params bp, *bpp; local in function:landisk_setboot
204 bpp = (void *)(bootstrapbuf + 512 * 2 + 8);
205 bplen = le32toh(bpp->bp_length);
211 memcpy(&bp, bpp, bplen);
221 memcpy(bpp, &bp, bplen);
i386.c 203 show_i386_boot_params(struct x86_boot_params *bpp)
208 printf("timeout %d, ", le32toh(bpp->bp_timeout));
209 printf("flags %x, ", le32toh(bpp->bp_flags));
210 printf("speed %d, ", le32toh(bpp->bp_conspeed));
211 printf("ioaddr %x, ", le32toh(bpp->bp_consaddr));
213 if (consoles[i].dev == (int)le32toh(bpp->bp_consdev))
217 printf("console %d\n", le32toh(bpp->bp_consdev));
220 if (bpp->bp_keymap[0])
221 printf(" keymap %s\n", bpp->bp_keymap);
231 update_i386_boot_params(ib_params *params, struct x86_boot_params *bpp)
506 struct x86_boot_params *bpp; local in function:i386_editboot
    [all...]
  /src/sys/ufs/lfs/
lfs_debug.c 284 struct buf **bpp; local in function:lfs_check_bpp
288 blkno = (*(sp->bpp))->b_blkno;
289 for (bpp = sp->bpp; bpp < sp->cbpp; bpp++) {
290 if ((*bpp)->b_blkno != blkno) {
291 if ((*bpp)->b_vp == devvp) {
294 (*bpp)->b_blkno,
302 VTOI((*bpp)->b_vp)->i_number
    [all...]
lfs_kernel.h 79 struct buf **bpp; /* Array of kept buffers */ member in struct:lfs_cluster
  /src/sys/external/bsd/drm2/dist/drm/i915/gvt/
fb_decoder.c 49 int bpp; /* Bits per pixel, 0 indicates invalid */ member in struct:pixel_format
62 /* non-supported format has bpp default to 0 */
82 /* non-supported format has bpp default to 0 */
152 u32 tiled, int stride_mask, int bpp)
171 if (bpp == 8)
173 else if (bpp == 16 || bpp == 32 || bpp == 64)
176 gvt_dbg_core("skl: unsupported bpp:%d\n", bpp);
287 u8 bpp; \/* Bits per pixel; 0 indicates invalid *\/ member in struct:cursor_mode_format
    [all...]
fb_decoder.h 109 u8 bpp; /* bits per pixel */ member in struct:intel_vgpu_primary_plane_format
124 u8 bpp; /* bits per pixel */ member in struct:intel_vgpu_sprite_plane_format
141 u8 bpp; /* bits per pixel */ member in struct:intel_vgpu_cursor_plane_format
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/
amdgpu_dce110_mem_input_v.c 527 { 64, 512, 1, 8, 0, 1, 0, 0, 0}, /* new for 64bpp from HW */
541 } bpp; local in function:get_dvmm_hw_setting
544 bpp = bpp_32;
546 bpp = chroma ? bpp_16 : bpp_8;
548 bpp = bpp_8;
554 return dvmm_Hw_Setting_1DTiling[bpp];
560 return dvmm_Hw_Setting_2DTiling[bpp];
563 return dvmm_Hw_Setting_Linear[bpp];
565 return dvmm_Hw_Setting_2DTiling[bpp];
  /src/sys/external/bsd/drm2/dist/drm/nouveau/dispnv04/
nouveau_dispnv04_arb.c 50 int bpp; member in struct:nv_sim_state
61 int pagemiss, cas, bpp; local in function:nv04_calc_arb
73 bpp = arb->bpp;
89 crtc_drain_rate = pclk_freq * bpp / 8;
99 p1 = p1 * bpp / 8;
129 drain_rate = pclk_freq * arb->bpp / 8; /* kB/s */
166 + (arb->bpp == 32 ? 8 : 4); /* Margin of error. */
198 nv04_update_arb(struct drm_device *dev, int VClk, int bpp,
212 sim_data.bpp = bpp
    [all...]
  /src/sys/dev/pci/
if_ntwoc_pci.c 558 u_int bpp; local in function:ntwoc_pci_alloc_dma
570 bpp = sc->sc_numports * (NTWOC_NtxBUFS + NTWOC_NrxBUFS);
572 allocsize = bpp * (SCA_BSIZE + sizeof (sca_desc_t));
583 if (bpp * sizeof (sca_desc_t) > 64 * 1024)
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
amdgpu_dce_mem_input.c 45 unsigned int bpp; member in struct:pte_setting
76 { 64, 512, 1, 8, 0, 1, 0, 0, 0}, /* new for 64bpp from HW */
  /src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_dp_mst.c 522 int bpp = 24; local in function:radeon_mst_mode_fixup
526 mst_enc->pbn = drm_dp_calc_pbn_mode(adjusted_mode->clock, bpp, false);
radeon_atombios_dp.c 323 int bpp = convert_bpc_to_bpp(radeon_get_monitor_bpc(connector)); local in function:radeon_dp_get_dp_link_config
332 max_pix_clock = (lane_num * 270000 * 8) / bpp;
342 max_pix_clock = (lane_num * link_rates[i] * 8) / bpp;
  /src/sys/external/mit/xen-include-public/dist/xen/include/public/io/
displif.h 446 * | bpp | 28
476 * bpp - uint32_t, bits per pixel
505 uint32_t bpp; member in struct:xendispl_dbuf_create_req
677 * | bpp | 40
697 * bpp - uint32_t, bits per pixel
706 uint32_t bpp; member in struct:xendispl_set_config_req
  /src/sys/arch/luna68k/dev/
lunafb.c 402 * On 1bpp framebuffer, only plane P0 has framebuffer memory
446 * Set ANSI 16 colors. We only supports 4bpp console right
461 int bpp, i; local in function:omfb_getdevconfig
470 bpp = 8; /* XXX check monochrome bit in DIPSW */
474 bpp = 4; /* XXX check monochrome bit in DIPSW */
477 bpp = 1;
482 dc->dc_depth = bpp;
484 dc->dc_cmsize = (bpp == 1) ? 0 : 1 << bpp;
514 if (bpp == 4 || bpp == 8
    [all...]
  /src/sys/arch/hpcmips/dev/
plumvideo.c 97 /* clut buffer (8bpp only) */
312 int bpp, width, height, vram_pitch; local in function:plumvideo_init
333 bpp = 16;
348 bpp = 8;
351 chip->vc_fbdepth = bpp;
365 vram_pitch = bootinfo->fb_line_bytes = (width * bpp) / NBBY;
375 switch (bpp) {
380 printf("8bpp ");
393 printf("16bpp ");
401 vram_size = (width * height * bpp) / NBBY
    [all...]
  /src/sbin/fsck_lfs/
segwrite.c 691 sp->cbpp = sp->bpp;
765 struct ubuf **bpp, *bp; local in function:lfs_writeseg
781 nblocks = sp->cbpp - sp->bpp;
784 nblocks, (int)LFS_DBTOFSB(fs, (*sp->bpp)->b_blkno));
796 for (bpp = sp->bpp; ++bpp < sp->cbpp;) {
797 if ((*bpp)->b_vp != devvp) {
798 sup->su_nbytes += (*bpp)->b_bcount;
800 assert(lfs_dtosn(fs, LFS_DBTOFSB(fs, (*bpp)->b_blkno)) == sp->seg_number)
    [all...]
  /src/sys/dev/rasops/
rasops.c 333 int bpp, height, s; local in function:rasops_reconfig
393 bpp = (ri->ri_depth == 15 ? 16 : ri->ri_depth);
418 while ((ri->ri_emuwidth * bpp & 31) != 0)
431 ri->ri_emustride = ri->ri_emuwidth * bpp >> 3;
434 ri->ri_pelbytes = bpp >> 3;
436 ri->ri_xscale = (ri->ri_font->fontwidth * bpp) >> 3;
455 xoff = ((ri->ri_width * bpp >> 3) - ri->ri_emustride) >> 1;
481 ri->ri_stride) * 8 / bpp);
985 * Erase rows. This isn't static, since 24-bpp uses it in special cases.
1085 * fontwidth = 8 and bpp = 1. So we take care of it
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_atombios_dp.c 265 unsigned bpp = local in function:amdgpu_atombios_dp_get_dp_link_config
275 max_pix_clock = (lane_num * 270000 * 8) / bpp;
285 max_pix_clock = (lane_num * link_rates[i] * 8) / bpp;

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