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      1 /*	$NetBSD: bestcommvar.h,v 1.1 2026/06/27 13:28:34 rkujawa Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 2026 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Radoslaw Kujawa and Robert Swindells.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  * POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 #ifndef _POWERPC_MPC5200_BESTCOMMVAR_H_
     33 #define _POWERPC_MPC5200_BESTCOMMVAR_H_
     34 
     35 #include <sys/device.h>
     36 #include <sys/bus.h>
     37 
     38 #include <powerpc/pic/picvar.h>
     39 
     40 struct bestcomm_ops {
     41 	struct pic_ops	pic;
     42 	bus_space_tag_t	bst;
     43 	bus_space_handle_t bsh;
     44 	uint32_t	int_mask;		/* shadow of SDMA_INT_MASK */
     45 };
     46 
     47 struct bestcomm_softc {
     48 	device_t		sc_dev;
     49 	struct bestcomm_ops	sc_pic;
     50 	bus_dma_tag_t		sc_dmat;
     51 	bus_addr_t		sc_taskbar;	/* SRAM phys base of image */
     52 	void			*sc_image_kva;	/* CPU pointer to the image */
     53 	void			*sc_cascade;	/* SIU cascade interrupt */
     54 };
     55 
     56 /*
     57  * BestComm SDMA engine interface.
     58  */
     59 struct bestcomm_tdt {
     60 	uint32_t	tdt_start;	/* first descriptor word		*/
     61 	uint32_t	tdt_stop;	/* last descriptor word			*/
     62 	uint32_t	tdt_var;	/* variable table			*/
     63 	uint32_t	tdt_fdt;	/* function descriptor table & flags	*/
     64 	uint32_t	tdt_rsvd1;
     65 	uint32_t	tdt_rsvd2;
     66 	uint32_t	tdt_context;	/* context save area			*/
     67 	uint32_t	tdt_litbase;	/* literal base				*/
     68 };
     69 
     70 bool	bestcomm_available(void);	/* did the SDMA engine attach? */
     71 
     72 /*
     73  * Buffer-descriptor task support (FEC rx/tx and similar peripheral DMA).
     74  */
     75 struct bestcomm_bdring {
     76 	int		br_task;	/* task slot in the image	*/
     77 	void		*br_bd;		/* CPU pointer to the BD array	*/
     78 	bus_addr_t	br_bd_pa;	/* SRAM physical of the BD array */
     79 	u_int		br_nbd;		/* number of descriptors	*/
     80 	bool		br_bdflag;	/* descriptors carry frame flags */
     81 };
     82 
     83 #define	BESTCOMM_BD_READY	0x40000000	/* engine owns this BD	*/
     84 #define	BESTCOMM_BD_LEN_MASK	0x0000ffff	/* transfer length	*/
     85 #define	BESTCOMM_BD_FLAG_LAST	0x08000000	/* last buffer of frame	*/
     86 #define	BESTCOMM_BD_FLAG_INT	0x04000000	/* interrupt after buffer */
     87 
     88 /*
     89  * Variable-table layout of a single-pointer BD task
     90  */
     91 struct bestcomm_bd_layout {
     92 	uint8_t		fifo_var;
     93 	uint8_t		enable_var;
     94 	uint8_t		base_var;
     95 	uint8_t		bytes_var;
     96 	int8_t		drd_var;
     97 	uint16_t	drd_off;
     98 	bool		bdflag;
     99 };
    100 
    101 /* The FEC receive (FIFO->memory) and transmit (memory->FIFO) layouts. */
    102 #define	BESTCOMM_LAYOUT_FEC_RX	{ 1, 0, 2, 5, -1, 0, false }
    103 #define	BESTCOMM_LAYOUT_FEC_TX	{ 1, 2, 3, 6, 0, 0x7c, true }
    104 
    105 /*
    106  * The general-purpose single-pointer BD tasks.
    107  */
    108 #define	BESTCOMM_LAYOUT_GEN_TX	{ 0, 1, 2, 5, -1, 0, false }
    109 #define	BESTCOMM_LAYOUT_GEN_RX	{ 1, 0, 2, 5, -1, 0, false }
    110 
    111 /*
    112  * Set up a single-pointer BD task.
    113  */
    114 int	bestcomm_bd_setup(struct bestcomm_bdring *, int task,
    115 	    const struct bestcomm_bd_layout *, bus_addr_t fifo_pa, u_int nbd,
    116 	    uint32_t maxbuf, int datasize, int initiator, int prio);
    117 void	bestcomm_bd_teardown(struct bestcomm_bdring *);
    118 
    119 /*
    120  * Stamp a hardware initiator into a runtime-configurable task.
    121  */
    122 void	bestcomm_task_set_initiator(int task, int initiator,
    123 	    const uint16_t *drd_offs, u_int ndrd);
    124 void	bestcomm_bd_post(struct bestcomm_bdring *, u_int idx, bus_addr_t buf_pa,
    125 	    uint32_t size, uint32_t flags);
    126 uint32_t bestcomm_bd_status(struct bestcomm_bdring *, u_int idx);
    127 void	bestcomm_task_start(int task);
    128 void	bestcomm_task_stop(int task);
    129 int	bestcomm_task_irq(int task);	/* flat IRQ of a task's completion */
    130 uint32_t bestcomm_intpend(void);	/* raw SDMA interrupt-pending (debug) */
    131 uint16_t bestcomm_task_tcr(int task);	/* raw task control register (debug) */
    132 
    133 #endif /* _POWERPC_MPC5200_BESTCOMMVAR_H_ */
    134