1 /* $NetBSD: ka410.c,v 1.34 2017/05/22 16:46:15 ragge Exp $ */ 2 /* 3 * Copyright (c) 1996 Ludd, University of Lule}, Sweden. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to Ludd by Bertram Barth. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: ka410.c,v 1.34 2017/05/22 16:46:15 ragge Exp $"); 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/cpu.h> 35 #include <sys/device.h> 36 #include <sys/kernel.h> 37 38 #include <machine/sid.h> 39 #include <machine/nexus.h> 40 #include <machine/ka410.h> 41 #include <machine/ka420.h> 42 #include <machine/clock.h> 43 #include <machine/vsbus.h> 44 45 static void ka410_conf(void); 46 static void ka410_memerr(void); 47 static int ka410_mchk(void *); 48 static void ka410_halt(void); 49 static void ka410_reboot(int); 50 static void ka41_cache_enable(void); 51 static void ka410_clrf(void); 52 53 static const char * const ka410_devs[] = { "cpu", "vsbus", NULL }; 54 55 static void * l2cache; /* mapped in address */ 56 static long *cacr; /* l2csche ctlr reg */ 57 58 /* 59 * Declaration of 410-specific calls. 60 */ 61 const struct cpu_dep ka410_calls = { 62 .cpu_mchk = ka410_mchk, 63 .cpu_memerr = ka410_memerr, 64 .cpu_conf = ka410_conf, 65 .cpu_gettime = chip_gettime, 66 .cpu_settime = chip_settime, 67 .cpu_vups = 1, /* ~VUPS */ 68 .cpu_scbsz = 2, /* SCB pages */ 69 .cpu_halt = ka410_halt, 70 .cpu_reboot = ka410_reboot, 71 .cpu_clrf = ka410_clrf, 72 .cpu_devs = ka410_devs, 73 .cpu_flags = CPU_RAISEIPL, 74 }; 75 76 77 void 78 ka410_conf(void) 79 { 80 struct cpu_info * const ci = curcpu(); 81 struct vs_cpu *ka410_cpu; 82 83 ka410_cpu = (struct vs_cpu *)vax_map_physmem(VS_REGS, 1); 84 85 switch (vax_cputype) { 86 case VAX_TYP_UV2: 87 ka410_cpu->vc_410mser = 1; 88 ci->ci_cpustr = "KA410, UV2"; 89 break; 90 91 case VAX_TYP_CVAX: 92 ka410_cpu->vc_vdcorg = 0; /* XXX */ 93 ka410_cpu->vc_parctl = PARCTL_CPEN | PARCTL_DPEN ; 94 mtpr(KA420_CADR_S2E|KA420_CADR_S1E|KA420_CADR_ISE|KA420_CADR_DSE, PR_CADR); 95 if (vax_confdata & KA420_CFG_CACHPR) { 96 l2cache = (void *)vax_map_physmem(KA420_CH2_BASE, 97 (KA420_CH2_SIZE / VAX_NBPG)); 98 cacr = (void *)vax_map_physmem(KA420_CACR, 1); 99 ka41_cache_enable(); 100 ci->ci_cpustr = 101 "KA420, CVAX, 1KB L1 cache, 64KB L2 cache"; 102 } else { 103 ci->ci_cpustr = "KA420, CVAX, 1KB L1 cache"; 104 } 105 } 106 /* Done with ka410_cpu - release it */ 107 vax_unmap_physmem((vaddr_t)ka410_cpu, 1); 108 /* 109 * Setup parameters necessary to read time from clock chip. 110 */ 111 clk_adrshift = 1; /* Addressed at long's... */ 112 clk_tweak = 2; /* ...and shift two */ 113 clk_page = (short *)vax_map_physmem(KA420_WAT_BASE, 1); 114 } 115 116 void 117 ka41_cache_enable(void) 118 { 119 *cacr = KA420_CACR_TPE; /* Clear any error, disable cache */ 120 memset(l2cache, 0, KA420_CH2_SIZE); /* Clear whole cache */ 121 *cacr = KA420_CACR_CEN; /* Enable cache */ 122 } 123 124 void 125 ka410_memerr(void) 126 { 127 printf("Memory err!\n"); 128 } 129 130 int 131 ka410_mchk(void *addr) 132 { 133 panic("Machine check"); 134 return 0; 135 } 136 137 static void 138 ka410_halt(void) 139 { 140 __asm("movl $0xc, (%0)"::"r"((int)clk_page + 0x38)); /* Don't ask */ 141 __asm("halt"); 142 } 143 144 static void 145 ka410_reboot(int arg) 146 { 147 __asm("movl $0xc, (%0)"::"r"((int)clk_page + 0x38)); /* Don't ask */ 148 __asm("halt"); 149 } 150 151 static void 152 ka410_clrf(void) 153 { 154 volatile struct ka410_clock *clk = (volatile void *)clk_page; 155 156 /* 157 * Clear restart and boot in progress flags 158 * in the CPMBX. (ie. clear bits 4 and 5) 159 */ 160 clk->cpmbx = (clk->cpmbx & ~0x30); 161 } 162