1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * at91sam9263.dtsi - Device Tree Include file for AT91SAM9263 family SoC 4 * 5 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj (a] jcrosoft.com> 6 */ 7 8 #include <dt-bindings/pinctrl/at91.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/clock/at91.h> 12 13 / { 14 #address-cells = <1>; 15 #size-cells = <1>; 16 model = "Atmel AT91SAM9263 family SoC"; 17 compatible = "atmel,at91sam9263"; 18 interrupt-parent = <&aic>; 19 20 aliases { 21 serial0 = &dbgu; 22 serial1 = &usart0; 23 serial2 = &usart1; 24 serial3 = &usart2; 25 gpio0 = &pioA; 26 gpio1 = &pioB; 27 gpio2 = &pioC; 28 gpio3 = &pioD; 29 gpio4 = &pioE; 30 tcb0 = &tcb0; 31 i2c0 = &i2c0; 32 ssc0 = &ssc0; 33 ssc1 = &ssc1; 34 pwm0 = &pwm0; 35 }; 36 37 cpus { 38 #address-cells = <1>; 39 #size-cells = <0>; 40 41 cpu@0 { 42 compatible = "arm,arm926ej-s"; 43 device_type = "cpu"; 44 reg = <0>; 45 }; 46 }; 47 48 memory@20000000 { 49 device_type = "memory"; 50 reg = <0x20000000 0x08000000>; 51 }; 52 53 clocks { 54 main_xtal: main_xtal { 55 compatible = "fixed-clock"; 56 #clock-cells = <0>; 57 clock-frequency = <0>; 58 }; 59 60 slow_xtal: slow_xtal { 61 compatible = "fixed-clock"; 62 #clock-cells = <0>; 63 clock-frequency = <0>; 64 }; 65 }; 66 67 sram0: sram@300000 { 68 compatible = "mmio-sram"; 69 reg = <0x00300000 0x14000>; 70 #address-cells = <1>; 71 #size-cells = <1>; 72 ranges = <0 0x00300000 0x14000>; 73 }; 74 75 sram1: sram@500000 { 76 compatible = "mmio-sram"; 77 reg = <0x00500000 0x4000>; 78 #address-cells = <1>; 79 #size-cells = <1>; 80 ranges = <0 0x00500000 0x4000>; 81 }; 82 83 ahb { 84 compatible = "simple-bus"; 85 #address-cells = <1>; 86 #size-cells = <1>; 87 ranges; 88 89 apb { 90 compatible = "simple-bus"; 91 #address-cells = <1>; 92 #size-cells = <1>; 93 ranges; 94 95 aic: interrupt-controller@fffff000 { 96 #interrupt-cells = <3>; 97 compatible = "atmel,at91rm9200-aic"; 98 interrupt-controller; 99 reg = <0xfffff000 0x200>; 100 atmel,external-irqs = <30 31>; 101 }; 102 103 pmc: pmc@fffffc00 { 104 compatible = "atmel,at91sam9263-pmc", "syscon"; 105 reg = <0xfffffc00 0x100>; 106 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 107 #clock-cells = <2>; 108 clocks = <&slow_xtal>, <&main_xtal>; 109 clock-names = "slow_xtal", "main_xtal"; 110 }; 111 112 ramc0: ramc@ffffe200 { 113 compatible = "atmel,at91sam9260-sdramc"; 114 reg = <0xffffe200 0x200>; 115 }; 116 117 smc0: smc@ffffe400 { 118 compatible = "atmel,at91sam9260-smc", "syscon"; 119 reg = <0xffffe400 0x200>; 120 }; 121 122 ramc1: ramc@ffffe800 { 123 compatible = "atmel,at91sam9260-sdramc"; 124 reg = <0xffffe800 0x200>; 125 }; 126 127 smc1: smc@ffffea00 { 128 compatible = "atmel,at91sam9260-smc", "syscon"; 129 reg = <0xffffea00 0x200>; 130 }; 131 132 matrix: matrix@ffffec00 { 133 compatible = "atmel,at91sam9263-matrix", "syscon"; 134 reg = <0xffffec00 0x200>; 135 }; 136 137 pit: timer@fffffd30 { 138 compatible = "atmel,at91sam9260-pit"; 139 reg = <0xfffffd30 0xf>; 140 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 141 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; 142 }; 143 144 tcb0: timer@fff7c000 { 145 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon"; 146 #address-cells = <1>; 147 #size-cells = <0>; 148 reg = <0xfff7c000 0x100>; 149 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>; 150 clocks = <&pmc PMC_TYPE_PERIPHERAL 19>, <&slow_xtal>; 151 clock-names = "t0_clk", "slow_clk"; 152 }; 153 154 rstc@fffffd00 { 155 compatible = "atmel,at91sam9260-rstc"; 156 reg = <0xfffffd00 0x10>; 157 clocks = <&slow_xtal>; 158 }; 159 160 shdwc@fffffd10 { 161 compatible = "atmel,at91sam9260-shdwc"; 162 reg = <0xfffffd10 0x10>; 163 clocks = <&slow_xtal>; 164 }; 165 166 pinctrl@fffff200 { 167 #address-cells = <1>; 168 #size-cells = <1>; 169 compatible = "atmel,at91rm9200-pinctrl", "simple-bus"; 170 ranges = <0xfffff200 0xfffff200 0xa00>; 171 172 atmel,mux-mask = < 173 /* A B */ 174 0xfffffffb 0xffffe07f /* pioA */ 175 0x0007ffff 0x39072fff /* pioB */ 176 0xffffffff 0x3ffffff8 /* pioC */ 177 0xfffffbff 0xffffffff /* pioD */ 178 0xffe00fff 0xfbfcff00 /* pioE */ 179 >; 180 181 /* shared pinctrl settings */ 182 dbgu { 183 pinctrl_dbgu: dbgu-0 { 184 atmel,pins = 185 <AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP 186 AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; 187 }; 188 }; 189 190 usart0 { 191 pinctrl_usart0: usart0-0 { 192 atmel,pins = 193 <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP 194 AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; 195 }; 196 197 pinctrl_usart0_rts: usart0_rts-0 { 198 atmel,pins = 199 <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA28 periph A */ 200 }; 201 202 pinctrl_usart0_cts: usart0_cts-0 { 203 atmel,pins = 204 <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA29 periph A */ 205 }; 206 }; 207 208 usart1 { 209 pinctrl_usart1: usart1-0 { 210 atmel,pins = 211 <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP 212 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; 213 }; 214 215 pinctrl_usart1_rts: usart1_rts-0 { 216 atmel,pins = 217 <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD7 periph B */ 218 }; 219 220 pinctrl_usart1_cts: usart1_cts-0 { 221 atmel,pins = 222 <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD8 periph B */ 223 }; 224 }; 225 226 usart2 { 227 pinctrl_usart2: usart2-0 { 228 atmel,pins = 229 <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP 230 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; 231 }; 232 233 pinctrl_usart2_rts: usart2_rts-0 { 234 atmel,pins = 235 <AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD5 periph B */ 236 }; 237 238 pinctrl_usart2_cts: usart2_cts-0 { 239 atmel,pins = 240 <AT91_PIOD 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD6 periph B */ 241 }; 242 }; 243 244 nand { 245 pinctrl_nand_rb: nand-rb-0 { 246 atmel,pins = 247 <AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; 248 }; 249 250 pinctrl_nand_cs: nand-cs-0 { 251 atmel,pins = 252 <AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; 253 }; 254 }; 255 256 macb { 257 pinctrl_macb_rmii: macb_rmii-0 { 258 atmel,pins = 259 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */ 260 AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE21 periph A */ 261 AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE23 periph A */ 262 AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE24 periph A */ 263 AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE25 periph A */ 264 AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE26 periph A */ 265 AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE27 periph A */ 266 AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE28 periph A */ 267 AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE29 periph A */ 268 AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */ 269 }; 270 271 pinctrl_macb_rmii_mii: macb_rmii_mii-0 { 272 atmel,pins = 273 <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC20 periph B */ 274 AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC21 periph B */ 275 AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC22 periph B */ 276 AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC23 periph B */ 277 AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC24 periph B */ 278 AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */ 279 AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC27 periph B */ 280 AT91_PIOE 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE22 periph B */ 281 }; 282 }; 283 284 mmc0 { 285 pinctrl_mmc0_clk: mmc0_clk-0 { 286 atmel,pins = 287 <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA12 periph A */ 288 }; 289 290 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 { 291 atmel,pins = 292 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */ 293 AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA0 periph A with pullup */ 294 }; 295 296 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { 297 atmel,pins = 298 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */ 299 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */ 300 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA5 periph A with pullup */ 301 }; 302 303 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 { 304 atmel,pins = 305 <AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */ 306 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA17 periph A with pullup */ 307 }; 308 309 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 { 310 atmel,pins = 311 <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */ 312 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */ 313 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */ 314 }; 315 }; 316 317 mmc1 { 318 pinctrl_mmc1_clk: mmc1_clk-0 { 319 atmel,pins = 320 <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA6 periph A */ 321 }; 322 323 pinctrl_mmc1_slot0_cmd_dat0: mmc1_slot0_cmd_dat0-0 { 324 atmel,pins = 325 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */ 326 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA8 periph A with pullup */ 327 }; 328 329 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 { 330 atmel,pins = 331 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */ 332 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */ 333 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */ 334 }; 335 336 pinctrl_mmc1_slot1_cmd_dat0: mmc1_slot1_cmd_dat0-0 { 337 atmel,pins = 338 <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA21 periph A with pullup */ 339 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA22 periph A with pullup */ 340 }; 341 342 pinctrl_mmc1_slot1_dat1_3: mmc1_slot1_dat1_3-0 { 343 atmel,pins = 344 <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA23 periph A with pullup */ 345 AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA24 periph A with pullup */ 346 AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA25 periph A with pullup */ 347 }; 348 }; 349 350 ssc0 { 351 pinctrl_ssc0_tx: ssc0_tx-0 { 352 atmel,pins = 353 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB0 periph B */ 354 AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB1 periph B */ 355 AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB2 periph B */ 356 }; 357 358 pinctrl_ssc0_rx: ssc0_rx-0 { 359 atmel,pins = 360 <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B */ 361 AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB4 periph B */ 362 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B */ 363 }; 364 }; 365 366 ssc1 { 367 pinctrl_ssc1_tx: ssc1_tx-0 { 368 atmel,pins = 369 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */ 370 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */ 371 AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */ 372 }; 373 374 pinctrl_ssc1_rx: ssc1_rx-0 { 375 atmel,pins = 376 <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */ 377 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A */ 378 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */ 379 }; 380 }; 381 382 spi0 { 383 pinctrl_spi0: spi0-0 { 384 atmel,pins = 385 <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA0 periph B SPI0_MISO pin */ 386 AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA1 periph B SPI0_MOSI pin */ 387 AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA2 periph B SPI0_SPCK pin */ 388 }; 389 }; 390 391 spi1 { 392 pinctrl_spi1: spi1-0 { 393 atmel,pins = 394 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A SPI1_MISO pin */ 395 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A SPI1_MOSI pin */ 396 AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A SPI1_SPCK pin */ 397 }; 398 }; 399 400 tcb0 { 401 pinctrl_tcb0_tclk0: tcb0_tclk0-0 { 402 atmel,pins = <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>; 403 }; 404 405 pinctrl_tcb0_tclk1: tcb0_tclk1-0 { 406 atmel,pins = <AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>; 407 }; 408 409 pinctrl_tcb0_tclk2: tcb0_tclk2-0 { 410 atmel,pins = <AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; 411 }; 412 413 pinctrl_tcb0_tioa0: tcb0_tioa0-0 { 414 atmel,pins = <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE>; 415 }; 416 417 pinctrl_tcb0_tioa1: tcb0_tioa1-0 { 418 atmel,pins = <AT91_PIOE 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; 419 }; 420 421 pinctrl_tcb0_tioa2: tcb0_tioa2-0 { 422 atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; 423 }; 424 425 pinctrl_tcb0_tiob0: tcb0_tiob0-0 { 426 atmel,pins = <AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; 427 }; 428 429 pinctrl_tcb0_tiob1: tcb0_tiob1-0 { 430 atmel,pins = <AT91_PIOE 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; 431 }; 432 433 pinctrl_tcb0_tiob2: tcb0_tiob2-0 { 434 atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>; 435 }; 436 }; 437 438 fb { 439 pinctrl_fb: fb-0 { 440 atmel,pins = 441 <AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC1 periph A */ 442 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC2 periph A */ 443 AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC3 periph A */ 444 AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB9 periph B */ 445 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC6 periph A */ 446 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC7 periph A */ 447 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC8 periph A */ 448 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC9 periph A */ 449 AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC10 periph A */ 450 AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC11 periph A */ 451 AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC14 periph A */ 452 AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC15 periph A */ 453 AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC16 periph A */ 454 AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC12 periph B */ 455 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC18 periph A */ 456 AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC19 periph A */ 457 AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC22 periph A */ 458 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC23 periph A */ 459 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC24 periph A */ 460 AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC17 periph B */ 461 AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC26 periph A */ 462 AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC27 periph A */ 463 }; 464 }; 465 466 can { 467 pinctrl_can_rx_tx: can_rx_tx { 468 atmel,pins = 469 <AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* CANRX, conflicts with IRQ0 */ 470 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* CANTX, conflicts with PCK0 */ 471 }; 472 }; 473 474 ac97 { 475 pinctrl_ac97: ac97-0 { 476 atmel,pins = 477 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A AC97FS pin */ 478 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A AC97CK pin */ 479 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A AC97TX pin */ 480 AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A AC97RX pin */ 481 }; 482 }; 483 484 pioA: gpio@fffff200 { 485 compatible = "atmel,at91rm9200-gpio"; 486 reg = <0xfffff200 0x200>; 487 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; 488 #gpio-cells = <2>; 489 gpio-controller; 490 interrupt-controller; 491 #interrupt-cells = <2>; 492 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>; 493 }; 494 495 pioB: gpio@fffff400 { 496 compatible = "atmel,at91rm9200-gpio"; 497 reg = <0xfffff400 0x200>; 498 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; 499 #gpio-cells = <2>; 500 gpio-controller; 501 interrupt-controller; 502 #interrupt-cells = <2>; 503 clocks = <&pmc PMC_TYPE_PERIPHERAL 3>; 504 }; 505 506 pioC: gpio@fffff600 { 507 compatible = "atmel,at91rm9200-gpio"; 508 reg = <0xfffff600 0x200>; 509 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; 510 #gpio-cells = <2>; 511 gpio-controller; 512 interrupt-controller; 513 #interrupt-cells = <2>; 514 clocks = <&pmc PMC_TYPE_PERIPHERAL 4>; 515 }; 516 517 pioD: gpio@fffff800 { 518 compatible = "atmel,at91rm9200-gpio"; 519 reg = <0xfffff800 0x200>; 520 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; 521 #gpio-cells = <2>; 522 gpio-controller; 523 interrupt-controller; 524 #interrupt-cells = <2>; 525 clocks = <&pmc PMC_TYPE_PERIPHERAL 4>; 526 }; 527 528 pioE: gpio@fffffa00 { 529 compatible = "atmel,at91rm9200-gpio"; 530 reg = <0xfffffa00 0x200>; 531 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; 532 #gpio-cells = <2>; 533 gpio-controller; 534 interrupt-controller; 535 #interrupt-cells = <2>; 536 clocks = <&pmc PMC_TYPE_PERIPHERAL 4>; 537 }; 538 }; 539 540 dbgu: serial@ffffee00 { 541 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; 542 reg = <0xffffee00 0x200>; 543 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 544 pinctrl-names = "default"; 545 pinctrl-0 = <&pinctrl_dbgu>; 546 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; 547 clock-names = "usart"; 548 status = "disabled"; 549 }; 550 551 usart0: serial@fff8c000 { 552 compatible = "atmel,at91sam9260-usart"; 553 reg = <0xfff8c000 0x200>; 554 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; 555 atmel,use-dma-rx; 556 atmel,use-dma-tx; 557 pinctrl-names = "default"; 558 pinctrl-0 = <&pinctrl_usart0>; 559 clocks = <&pmc PMC_TYPE_PERIPHERAL 7>; 560 clock-names = "usart"; 561 status = "disabled"; 562 }; 563 564 usart1: serial@fff90000 { 565 compatible = "atmel,at91sam9260-usart"; 566 reg = <0xfff90000 0x200>; 567 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; 568 atmel,use-dma-rx; 569 atmel,use-dma-tx; 570 pinctrl-names = "default"; 571 pinctrl-0 = <&pinctrl_usart1>; 572 clocks = <&pmc PMC_TYPE_PERIPHERAL 8>; 573 clock-names = "usart"; 574 status = "disabled"; 575 }; 576 577 usart2: serial@fff94000 { 578 compatible = "atmel,at91sam9260-usart"; 579 reg = <0xfff94000 0x200>; 580 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>; 581 atmel,use-dma-rx; 582 atmel,use-dma-tx; 583 pinctrl-names = "default"; 584 pinctrl-0 = <&pinctrl_usart2>; 585 clocks = <&pmc PMC_TYPE_PERIPHERAL 9>; 586 clock-names = "usart"; 587 status = "disabled"; 588 }; 589 590 ssc0: ssc@fff98000 { 591 compatible = "atmel,at91rm9200-ssc"; 592 reg = <0xfff98000 0x4000>; 593 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>; 594 pinctrl-names = "default"; 595 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; 596 clocks = <&pmc PMC_TYPE_PERIPHERAL 16>; 597 clock-names = "pclk"; 598 status = "disabled"; 599 }; 600 601 ssc1: ssc@fff9c000 { 602 compatible = "atmel,at91rm9200-ssc"; 603 reg = <0xfff9c000 0x4000>; 604 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>; 605 pinctrl-names = "default"; 606 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; 607 clocks = <&pmc PMC_TYPE_PERIPHERAL 17>; 608 clock-names = "pclk"; 609 status = "disabled"; 610 }; 611 612 ac97: sound@fffa0000 { 613 compatible = "atmel,at91sam9263-ac97c"; 614 reg = <0xfffa0000 0x4000>; 615 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 5>; 616 pinctrl-names = "default"; 617 pinctrl-0 = <&pinctrl_ac97>; 618 clocks = <&pmc PMC_TYPE_PERIPHERAL 18>; 619 clock-names = "ac97_clk"; 620 status = "disabled"; 621 }; 622 623 macb0: ethernet@fffbc000 { 624 compatible = "cdns,at91sam9260-macb", "cdns,macb"; 625 reg = <0xfffbc000 0x100>; 626 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>; 627 pinctrl-names = "default"; 628 pinctrl-0 = <&pinctrl_macb_rmii>; 629 clocks = <&pmc PMC_TYPE_PERIPHERAL 21>, <&pmc PMC_TYPE_PERIPHERAL 21>; 630 clock-names = "hclk", "pclk"; 631 status = "disabled"; 632 }; 633 634 usb1: gadget@fff78000 { 635 compatible = "atmel,at91sam9263-udc"; 636 reg = <0xfff78000 0x4000>; 637 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 2>; 638 clocks = <&pmc PMC_TYPE_PERIPHERAL 24>, <&pmc PMC_TYPE_SYSTEM 7>; 639 clock-names = "pclk", "hclk"; 640 status = "disabled"; 641 }; 642 643 i2c0: i2c@fff88000 { 644 compatible = "atmel,at91sam9260-i2c"; 645 reg = <0xfff88000 0x100>; 646 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>; 647 #address-cells = <1>; 648 #size-cells = <0>; 649 clocks = <&pmc PMC_TYPE_PERIPHERAL 13>; 650 status = "disabled"; 651 }; 652 653 mmc0: mmc@fff80000 { 654 compatible = "atmel,hsmci"; 655 reg = <0xfff80000 0x600>; 656 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>; 657 #address-cells = <1>; 658 #size-cells = <0>; 659 clocks = <&pmc PMC_TYPE_PERIPHERAL 10>; 660 clock-names = "mci_clk"; 661 status = "disabled"; 662 }; 663 664 mmc1: mmc@fff84000 { 665 compatible = "atmel,hsmci"; 666 reg = <0xfff84000 0x600>; 667 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>; 668 #address-cells = <1>; 669 #size-cells = <0>; 670 clocks = <&pmc PMC_TYPE_PERIPHERAL 11>; 671 clock-names = "mci_clk"; 672 status = "disabled"; 673 }; 674 675 watchdog@fffffd40 { 676 compatible = "atmel,at91sam9260-wdt"; 677 reg = <0xfffffd40 0x10>; 678 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 679 clocks = <&slow_xtal>; 680 atmel,watchdog-type = "hardware"; 681 atmel,reset-type = "all"; 682 atmel,dbg-halt; 683 status = "disabled"; 684 }; 685 686 spi0: spi@fffa4000 { 687 #address-cells = <1>; 688 #size-cells = <0>; 689 compatible = "atmel,at91rm9200-spi"; 690 reg = <0xfffa4000 0x200>; 691 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>; 692 pinctrl-names = "default"; 693 pinctrl-0 = <&pinctrl_spi0>; 694 clocks = <&pmc PMC_TYPE_PERIPHERAL 14>; 695 clock-names = "spi_clk"; 696 status = "disabled"; 697 }; 698 699 spi1: spi@fffa8000 { 700 #address-cells = <1>; 701 #size-cells = <0>; 702 compatible = "atmel,at91rm9200-spi"; 703 reg = <0xfffa8000 0x200>; 704 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 3>; 705 pinctrl-names = "default"; 706 pinctrl-0 = <&pinctrl_spi1>; 707 clocks = <&pmc PMC_TYPE_PERIPHERAL 15>; 708 clock-names = "spi_clk"; 709 status = "disabled"; 710 }; 711 712 pwm0: pwm@fffb8000 { 713 compatible = "atmel,at91sam9rl-pwm"; 714 reg = <0xfffb8000 0x300>; 715 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 4>; 716 #pwm-cells = <3>; 717 clocks = <&pmc PMC_TYPE_PERIPHERAL 20>; 718 clock-names = "pwm_clk"; 719 status = "disabled"; 720 }; 721 722 can: can@fffac000 { 723 compatible = "atmel,at91sam9263-can"; 724 reg = <0xfffac000 0x300>; 725 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>; 726 pinctrl-names = "default"; 727 pinctrl-0 = <&pinctrl_can_rx_tx>; 728 clocks = <&pmc PMC_TYPE_PERIPHERAL 12>; 729 clock-names = "can_clk"; 730 }; 731 732 rtc@fffffd20 { 733 compatible = "atmel,at91sam9260-rtt"; 734 reg = <0xfffffd20 0x10>; 735 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 736 clocks = <&slow_xtal>; 737 status = "disabled"; 738 }; 739 740 rtc@fffffd50 { 741 compatible = "atmel,at91sam9260-rtt"; 742 reg = <0xfffffd50 0x10>; 743 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 744 clocks = <&slow_xtal>; 745 status = "disabled"; 746 }; 747 748 gpbr: syscon@fffffd60 { 749 compatible = "atmel,at91sam9260-gpbr", "syscon"; 750 reg = <0xfffffd60 0x50>; 751 status = "disabled"; 752 }; 753 }; 754 755 fb0: fb@700000 { 756 compatible = "atmel,at91sam9263-lcdc"; 757 reg = <0x00700000 0x1000>; 758 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 3>; 759 pinctrl-names = "default"; 760 pinctrl-0 = <&pinctrl_fb>; 761 clocks = <&pmc PMC_TYPE_PERIPHERAL 26>, <&pmc PMC_TYPE_PERIPHERAL 26>; 762 clock-names = "lcdc_clk", "hclk"; 763 status = "disabled"; 764 }; 765 766 usb0: ohci@a00000 { 767 compatible = "atmel,at91rm9200-ohci", "usb-ohci"; 768 reg = <0x00a00000 0x100000>; 769 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 2>; 770 clocks = <&pmc PMC_TYPE_PERIPHERAL 29>, <&pmc PMC_TYPE_PERIPHERAL 29>, <&pmc PMC_TYPE_SYSTEM 6>; 771 clock-names = "ohci_clk", "hclk", "uhpck"; 772 status = "disabled"; 773 }; 774 775 ebi0: ebi@10000000 { 776 compatible = "atmel,at91sam9263-ebi0"; 777 #address-cells = <2>; 778 #size-cells = <1>; 779 atmel,smc = <&smc0>; 780 atmel,matrix = <&matrix>; 781 reg = <0x10000000 0x80000000>; 782 ranges = <0x0 0x0 0x10000000 0x10000000 783 0x1 0x0 0x20000000 0x10000000 784 0x2 0x0 0x30000000 0x10000000 785 0x3 0x0 0x40000000 0x10000000 786 0x4 0x0 0x50000000 0x10000000 787 0x5 0x0 0x60000000 0x10000000>; 788 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; 789 status = "disabled"; 790 791 nand_controller0: nand-controller { 792 compatible = "atmel,at91sam9260-nand-controller"; 793 #address-cells = <2>; 794 #size-cells = <1>; 795 ranges; 796 status = "disabled"; 797 }; 798 }; 799 800 ebi1: ebi@70000000 { 801 compatible = "atmel,at91sam9263-ebi1"; 802 #address-cells = <2>; 803 #size-cells = <1>; 804 atmel,smc = <&smc1>; 805 atmel,matrix = <&matrix>; 806 reg = <0x80000000 0x20000000>; 807 ranges = <0x0 0x0 0x80000000 0x10000000 808 0x1 0x0 0x90000000 0x10000000>; 809 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; 810 status = "disabled"; 811 812 nand_controller1: nand-controller { 813 compatible = "atmel,at91sam9260-nand-controller"; 814 #address-cells = <2>; 815 #size-cells = <1>; 816 ranges; 817 status = "disabled"; 818 }; 819 }; 820 }; 821 822 i2c-gpio-0 { 823 compatible = "i2c-gpio"; 824 gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */ 825 &pioB 5 GPIO_ACTIVE_HIGH /* scl */ 826 >; 827 i2c-gpio,sda-open-drain; 828 i2c-gpio,scl-open-drain; 829 i2c-gpio,delay-us = <2>; /* ~100 kHz */ 830 #address-cells = <1>; 831 #size-cells = <0>; 832 status = "disabled"; 833 }; 834 }; 835
Indexes created Sat Sep 20 22:09:52 GMT 2025