1 /* $NetBSD: cardbus.c,v 1.115 2022/08/24 11:19:24 riastradh Exp $ */ 2 3 /* 4 * Copyright (c) 1997, 1998, 1999 and 2000 5 * HAYAKAWA Koichi. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 18 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 19 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 20 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 22 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 24 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 25 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: cardbus.c,v 1.115 2022/08/24 11:19:24 riastradh Exp $"); 31 32 #include "opt_cardbus.h" 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/device.h> 37 #include <sys/malloc.h> 38 #include <sys/kernel.h> 39 #include <sys/syslog.h> 40 #include <sys/proc.h> 41 #include <sys/reboot.h> /* for AB_* needed by bootverbose */ 42 43 #include <sys/bus.h> 44 45 #include <dev/cardbus/cardbusvar.h> 46 #include <dev/pci/pcidevs.h> 47 48 #include <dev/cardbus/cardbus_exrom.h> 49 50 #include <dev/pci/pcivar.h> /* XXX */ 51 #include <dev/pci/pcireg.h> /* XXX */ 52 53 #include <dev/pcmcia/pcmciareg.h> 54 55 #include "locators.h" 56 57 #if defined CARDBUS_DEBUG 58 #define STATIC 59 #define DPRINTF(a) printf a 60 #else 61 #define STATIC static 62 #define DPRINTF(a) 63 #endif 64 65 66 STATIC void cardbusattach(device_t, device_t, void *); 67 STATIC int cardbusdetach(device_t, int); 68 STATIC int cardbusmatch(device_t, cfdata_t, void *); 69 int cardbus_rescan(device_t, const char *, const int *); 70 void cardbus_childdetached(device_t, device_t); 71 static int cardbusprint(void *, const char *); 72 73 typedef void (*tuple_decode_func)(u_int8_t*, int, void*); 74 75 static int decode_tuples(u_int8_t *, int, tuple_decode_func, void*); 76 #ifdef CARDBUS_DEBUG 77 static void print_tuple(u_int8_t*, int, void*); 78 #endif 79 80 static int cardbus_read_tuples(struct cardbus_attach_args *, 81 pcireg_t, u_int8_t *, size_t); 82 83 static void enable_function(struct cardbus_softc *, int, int); 84 static void disable_function(struct cardbus_softc *, int); 85 86 static void cardbus_child_register(device_t); 87 88 CFATTACH_DECL3_NEW(cardbus, sizeof(struct cardbus_softc), 89 cardbusmatch, cardbusattach, cardbusdetach, NULL, 90 cardbus_rescan, cardbus_childdetached, DVF_DETACH_SHUTDOWN); 91 92 #ifndef __NetBSD_Version__ 93 struct cfdriver cardbus_cd = { 94 NULL, "cardbus", DV_DULL 95 }; 96 #endif 97 98 99 STATIC int 100 cardbusmatch(device_t parent, cfdata_t cf, void *aux) 101 { 102 103 return (1); 104 } 105 106 STATIC void 107 cardbusattach(device_t parent, device_t self, void *aux) 108 { 109 struct cardbus_softc *sc = device_private(self); 110 struct cbslot_attach_args *cba = aux; 111 112 sc->sc_dev = self; 113 114 sc->sc_bus = cba->cba_bus; 115 sc->sc_cacheline = cba->cba_cacheline; 116 sc->sc_max_lattimer = MIN(0xf8, cba->cba_max_lattimer); 117 118 aprint_naive("\n"); 119 aprint_normal(": bus %d", sc->sc_bus); 120 if (bootverbose) 121 aprint_normal(" cacheline 0x%x, lattimer 0x%x", 122 sc->sc_cacheline, sc->sc_max_lattimer); 123 aprint_normal("\n"); 124 125 sc->sc_iot = cba->cba_iot; /* CardBus I/O space tag */ 126 sc->sc_memt = cba->cba_memt; /* CardBus MEM space tag */ 127 sc->sc_dmat = cba->cba_dmat; /* DMA tag */ 128 sc->sc_cc = cba->cba_cc; 129 sc->sc_cf = cba->cba_cf; 130 131 sc->sc_rbus_iot = cba->cba_rbus_iot; 132 sc->sc_rbus_memt = cba->cba_rbus_memt; 133 134 if (!pmf_device_register(self, NULL, NULL)) 135 aprint_error_dev(self, "couldn't establish power handler\n"); 136 } 137 138 STATIC int 139 cardbusdetach(device_t self, int flags) 140 { 141 int rc; 142 143 if ((rc = config_detach_children(self, flags)) != 0) 144 return rc; 145 146 pmf_device_deregister(self); 147 return 0; 148 } 149 150 static int 151 cardbus_read_tuples(struct cardbus_attach_args *ca, pcireg_t cis_ptr, 152 u_int8_t *tuples, size_t len) 153 { 154 struct cardbus_softc *sc = ca->ca_ct->ct_sc; 155 cardbus_chipset_tag_t cc = ca->ca_ct->ct_cc; 156 cardbus_function_tag_t cf = ca->ca_ct->ct_cf; 157 pcitag_t tag = ca->ca_tag; 158 pcireg_t command; 159 bus_space_tag_t bar_tag; 160 bus_space_handle_t bar_memh; 161 bus_size_t bar_size; 162 bus_addr_t bar_addr; 163 pcireg_t reg; 164 int found = 0; 165 int cardbus_space = cis_ptr & CARDBUS_CIS_ASIMASK; 166 size_t mlen, n, tlen; 167 int i, j; 168 169 memset(tuples, 0, len); 170 171 cis_ptr = cis_ptr & CARDBUS_CIS_ADDRMASK; 172 173 switch (cardbus_space) { 174 case CARDBUS_CIS_ASI_TUPLE: 175 DPRINTF(("%s: reading CIS data from configuration space\n", 176 device_xname(sc->sc_dev))); 177 for (i = cis_ptr, j = 0; i < 0xff; i += 4) { 178 u_int32_t e = (*cf->cardbus_conf_read)(cc, tag, i); 179 tuples[j] = 0xff & e; 180 e >>= 8; 181 tuples[j + 1] = 0xff & e; 182 e >>= 8; 183 tuples[j + 2] = 0xff & e; 184 e >>= 8; 185 tuples[j + 3] = 0xff & e; 186 j += 4; 187 } 188 found++; 189 break; 190 191 case CARDBUS_CIS_ASI_BAR0: 192 case CARDBUS_CIS_ASI_BAR1: 193 case CARDBUS_CIS_ASI_BAR2: 194 case CARDBUS_CIS_ASI_BAR3: 195 case CARDBUS_CIS_ASI_BAR4: 196 case CARDBUS_CIS_ASI_BAR5: 197 case CARDBUS_CIS_ASI_ROM: 198 if (cardbus_space == CARDBUS_CIS_ASI_ROM) { 199 reg = CARDBUS_ROM_REG; 200 DPRINTF(("%s: reading CIS data from ROM\n", 201 device_xname(sc->sc_dev))); 202 } else { 203 reg = CARDBUS_CIS_ASI_BAR(cardbus_space); 204 DPRINTF(("%s: reading CIS data from BAR%d\n", 205 device_xname(sc->sc_dev), cardbus_space - 1)); 206 } 207 208 /* 209 * XXX zero register so mapreg_map doesn't get confused by old 210 * contents. 211 */ 212 cardbus_conf_write(cc, cf, tag, reg, 0); 213 if (Cardbus_mapreg_map(ca->ca_ct, reg, 214 PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 215 0, &bar_tag, &bar_memh, &bar_addr, &bar_size)) { 216 aprint_error_dev(sc->sc_dev, "failed to map memory\n"); 217 return (1); 218 } 219 aprint_debug_dev(sc->sc_dev, "mapped %ju bytes at 0x%jx\n", 220 (uintmax_t)bar_size, (uintmax_t)bar_addr); 221 222 if (cardbus_space == CARDBUS_CIS_ASI_ROM) { 223 pcireg_t exrom; 224 int save; 225 struct cardbus_rom_image_head rom_image; 226 struct cardbus_rom_image *p; 227 228 save = splhigh(); 229 /* enable rom address decoder */ 230 exrom = cardbus_conf_read(cc, cf, tag, reg); 231 cardbus_conf_write(cc, cf, tag, reg, exrom | 1); 232 233 command = cardbus_conf_read(cc, cf, tag, 234 PCI_COMMAND_STATUS_REG); 235 cardbus_conf_write(cc, cf, tag, 236 PCI_COMMAND_STATUS_REG, 237 command | PCI_COMMAND_MEM_ENABLE); 238 239 if (cardbus_read_exrom(bar_tag, bar_memh, &rom_image)) 240 goto out; 241 242 SIMPLEQ_FOREACH(p, &rom_image, next) { 243 if (p->rom_image == 244 CARDBUS_CIS_ASI_ROM_IMAGE(cis_ptr)) { 245 bus_space_read_region_1(p->romt, 246 p->romh, CARDBUS_CIS_ADDR(cis_ptr), 247 tuples, MIN(p->image_size, len)); 248 found++; 249 break; 250 } 251 } 252 while ((p = SIMPLEQ_FIRST(&rom_image)) != NULL) { 253 SIMPLEQ_REMOVE_HEAD(&rom_image, next); 254 free(p, M_DEVBUF); 255 } 256 out: 257 exrom = cardbus_conf_read(cc, cf, tag, reg); 258 cardbus_conf_write(cc, cf, tag, reg, exrom & ~1); 259 splx(save); 260 } else { 261 command = cardbus_conf_read(cc, cf, tag, 262 PCI_COMMAND_STATUS_REG); 263 cardbus_conf_write(cc, cf, tag, 264 PCI_COMMAND_STATUS_REG, 265 command | PCI_COMMAND_MEM_ENABLE); 266 267 mlen = MIN(bar_size - MIN(bar_size, cis_ptr), len); 268 for (n = 0; n < mlen; ) { 269 tuples[n] = bus_space_read_1(bar_tag, bar_memh, 270 cis_ptr+n); 271 if (tuples[n] == PCMCIA_CISTPL_END) 272 break; 273 if (tuples[n] == PCMCIA_CISTPL_NULL) { 274 n++; 275 continue; 276 } 277 n++; 278 tuples[n] = bus_space_read_1(bar_tag, bar_memh, 279 cis_ptr+n); 280 tlen = tuples[n]; 281 n++; 282 if (n+tlen >= mlen) 283 break; 284 bus_space_read_region_1(bar_tag, bar_memh, 285 cis_ptr+n, tuples+n, tlen); 286 n += tlen; 287 } 288 found++; 289 } 290 command = cardbus_conf_read(cc, cf, tag, 291 PCI_COMMAND_STATUS_REG); 292 cardbus_conf_write(cc, cf, tag, PCI_COMMAND_STATUS_REG, 293 command & ~PCI_COMMAND_MEM_ENABLE); 294 cardbus_conf_write(cc, cf, tag, reg, 0); 295 296 Cardbus_mapreg_unmap(ca->ca_ct, reg, bar_tag, bar_memh, 297 bar_size); 298 break; 299 300 #ifdef DIAGNOSTIC 301 default: 302 panic("%s: bad CIS space (%d)", device_xname(sc->sc_dev), 303 cardbus_space); 304 #endif 305 } 306 return (!found); 307 } 308 309 static void 310 parse_tuple(u_int8_t *tuple, int len, void *data) 311 { 312 struct cardbus_cis_info *cis = data; 313 char *p; 314 int i, bar_index; 315 316 switch (tuple[0]) { 317 case PCMCIA_CISTPL_MANFID: 318 if (tuple[1] != 4) { 319 DPRINTF(("%s: wrong length manufacturer id (%d)\n", 320 __func__, tuple[1])); 321 break; 322 } 323 cis->manufacturer = tuple[2] | (tuple[3] << 8); 324 cis->product = tuple[4] | (tuple[5] << 8); 325 break; 326 327 case PCMCIA_CISTPL_VERS_1: 328 memcpy(cis->cis1_info_buf, tuple + 2, tuple[1]); 329 i = 0; 330 p = cis->cis1_info_buf + 2; 331 while (i < 332 sizeof(cis->cis1_info) / sizeof(cis->cis1_info[0])) { 333 if (p >= cis->cis1_info_buf + tuple[1] || *p == '\xff') 334 break; 335 cis->cis1_info[i++] = p; 336 while (*p != '\0' && *p != '\xff') 337 p++; 338 if (*p == '\0') 339 p++; 340 } 341 break; 342 343 case PCMCIA_CISTPL_BAR: 344 if (tuple[1] != 6) { 345 DPRINTF(("%s: BAR with short length (%d)\n", 346 __func__, tuple[1])); 347 break; 348 } 349 bar_index = tuple[2] & 7; 350 if (bar_index == 0) { 351 DPRINTF(("%s: invalid ASI in BAR tuple\n", __func__)); 352 break; 353 } 354 bar_index--; 355 cis->bar[bar_index].flags = tuple[2]; 356 cis->bar[bar_index].size = 357 (tuple[4] << 0) | 358 (tuple[5] << 8) | 359 (tuple[6] << 16) | 360 (tuple[7] << 24); 361 break; 362 363 case PCMCIA_CISTPL_FUNCID: 364 cis->funcid = tuple[2]; 365 break; 366 367 case PCMCIA_CISTPL_FUNCE: 368 switch (cis->funcid) { 369 case PCMCIA_FUNCTION_SERIAL: 370 if (tuple[1] >= 2 && 371 /* XXX PCMCIA_TPLFE_TYPE_SERIAL_??? */ 372 tuple[2] == 0) { 373 cis->funce.serial.uart_type = tuple[3] & 0x1f; 374 cis->funce.serial.uart_present = 1; 375 } 376 break; 377 378 case PCMCIA_FUNCTION_NETWORK: 379 if (tuple[1] >= 8 && 380 tuple[2] == PCMCIA_TPLFE_TYPE_LAN_NID) { 381 if (tuple[3] > 382 sizeof(cis->funce.network.netid)) { 383 DPRINTF(("%s: unknown network id type " 384 "(len = %d)\n", 385 __func__, tuple[3])); 386 } else { 387 cis->funce.network.netid_present = 1; 388 memcpy(cis->funce.network.netid, 389 tuple + 4, tuple[3]); 390 } 391 } 392 break; 393 } 394 break; 395 } 396 } 397 398 /* 399 * int cardbus_attach_card(struct cardbus_softc *sc) 400 * 401 * This function attaches the card on the slot: turns on power, 402 * reads and analyses tuple, sets configuration index. 403 * 404 * This function returns the number of recognised device functions. 405 * If no functions are recognised, return 0. 406 */ 407 int 408 cardbus_attach_card(struct cardbus_softc *sc) 409 { 410 cardbus_chipset_tag_t cc; 411 cardbus_function_tag_t cf; 412 int cdstatus; 413 static int wildcard[CARDBUSCF_NLOCS] = { 414 CARDBUSCF_FUNCTION_DEFAULT 415 }; 416 417 cc = sc->sc_cc; 418 cf = sc->sc_cf; 419 420 DPRINTF(("cardbus_attach_card: cb%d start\n", 421 device_unit(sc->sc_dev))); 422 423 /* inspect initial voltage */ 424 if ((cdstatus = (*cf->cardbus_ctrl)(cc, CARDBUS_CD)) == 0) { 425 DPRINTF(("%s: no CardBus card on cb%d\n", __func__, 426 device_unit(sc->sc_dev))); 427 return (0); 428 } 429 430 device_pmf_driver_set_child_register(sc->sc_dev, cardbus_child_register); 431 cardbus_rescan(sc->sc_dev, "cardbus", wildcard); 432 return (1); /* XXX */ 433 } 434 435 int 436 cardbus_rescan(device_t self, const char *ifattr, 437 const int *locators) 438 { 439 struct cardbus_softc *sc = device_private(self); 440 cardbus_chipset_tag_t cc; 441 cardbus_function_tag_t cf; 442 pcitag_t tag; 443 pcireg_t id, class, cis_ptr; 444 pcireg_t bhlc, icr, lattimer; 445 int cdstatus; 446 int function, nfunction; 447 device_t csc; 448 cardbus_devfunc_t ct; 449 450 cc = sc->sc_cc; 451 cf = sc->sc_cf; 452 453 /* inspect initial voltage */ 454 if ((cdstatus = (*cf->cardbus_ctrl)(cc, CARDBUS_CD)) == 0) { 455 DPRINTF(("%s: no CardBus card on cb%d\n", __func__, 456 device_unit(sc->sc_dev))); 457 return (0); 458 } 459 460 /* 461 * XXX use fake function 8 to keep power on during whole 462 * configuration. 463 */ 464 enable_function(sc, cdstatus, 8); 465 function = 0; 466 467 tag = cardbus_make_tag(cc, cf, sc->sc_bus, function); 468 469 /* 470 * Wait until power comes up. Maximum 500 ms. 471 * 472 * XXX What is this for? The bridge driver ought to have waited 473 * XXX already. 474 */ 475 { 476 int i; 477 478 for (i = 0; i < 5; ++i) { 479 id = cardbus_conf_read(cc, cf, tag, PCI_ID_REG); 480 if (id != 0xffffffff && id != 0) { 481 break; 482 } 483 if (cold) { /* before kernel thread invoked */ 484 delay(100 * 1000); 485 } else { /* thread context */ 486 if (tsleep((void *)sc, PCATCH, "cardbus", 487 hz / 10) != EWOULDBLOCK) { 488 break; 489 } 490 } 491 } 492 aprint_debug_dev(self, "id reg valid in %d iterations\n", i); 493 if (i == 5) { 494 return (EIO); 495 } 496 } 497 498 bhlc = cardbus_conf_read(cc, cf, tag, PCI_BHLC_REG); 499 DPRINTF(("%s bhlc 0x%08x -> ", device_xname(sc->sc_dev), bhlc)); 500 nfunction = PCI_HDRTYPE_MULTIFN(bhlc) ? 8 : 1; 501 502 for (function = 0; function < nfunction; function++) { 503 struct cardbus_attach_args ca; 504 int locs[CARDBUSCF_NLOCS]; 505 506 if (locators[CARDBUSCF_FUNCTION] != 507 CARDBUSCF_FUNCTION_DEFAULT && 508 locators[CARDBUSCF_FUNCTION] != function) 509 continue; 510 511 if (sc->sc_funcs[function]) 512 continue; 513 514 tag = cardbus_make_tag(cc, cf, sc->sc_bus, function); 515 516 id = cardbus_conf_read(cc, cf, tag, PCI_ID_REG); 517 class = cardbus_conf_read(cc, cf, tag, PCI_CLASS_REG); 518 cis_ptr = cardbus_conf_read(cc, cf, tag, CARDBUS_CIS_REG); 519 520 /* Invalid vendor ID value? */ 521 if (PCI_VENDOR(id) == PCI_VENDOR_INVALID) { 522 continue; 523 } 524 525 DPRINTF(("cardbus_attach_card: " 526 "Vendor 0x%x, Product 0x%x, CIS 0x%x\n", 527 PCI_VENDOR(id), PCI_PRODUCT(id), cis_ptr)); 528 529 enable_function(sc, cdstatus, function); 530 531 /* clean up every BAR */ 532 cardbus_conf_write(cc, cf, tag, PCI_BAR0, 0); 533 cardbus_conf_write(cc, cf, tag, PCI_BAR1, 0); 534 cardbus_conf_write(cc, cf, tag, PCI_BAR2, 0); 535 cardbus_conf_write(cc, cf, tag, PCI_BAR3, 0); 536 cardbus_conf_write(cc, cf, tag, PCI_BAR4, 0); 537 cardbus_conf_write(cc, cf, tag, PCI_BAR5, 0); 538 cardbus_conf_write(cc, cf, tag, CARDBUS_ROM_REG, 0); 539 540 /* set initial latency and cacheline size */ 541 bhlc = cardbus_conf_read(cc, cf, tag, PCI_BHLC_REG); 542 icr = cardbus_conf_read(cc, cf, tag, PCI_INTERRUPT_REG); 543 DPRINTF(("%s func%d icr 0x%08x bhlc 0x%08x -> ", 544 device_xname(sc->sc_dev), function, icr, bhlc)); 545 bhlc &= ~(PCI_CACHELINE_MASK << PCI_CACHELINE_SHIFT); 546 bhlc |= (sc->sc_cacheline & PCI_CACHELINE_MASK) << 547 PCI_CACHELINE_SHIFT; 548 /* 549 * Set the initial value of the Latency Timer. 550 * 551 * While a PCI device owns the bus, its Latency 552 * Timer counts down bus cycles from its initial 553 * value to 0. Minimum Grant tells for how long 554 * the device wants to own the bus once it gets 555 * access, in units of 250ns. 556 * 557 * On a 33 MHz bus, there are 8 cycles per 250ns. 558 * So I multiply the Minimum Grant by 8 to find 559 * out the initial value of the Latency Timer. 560 * 561 * Avoid setting a Latency Timer less than 0x10, 562 * since the old code did not do that. 563 */ 564 lattimer = 565 MIN(sc->sc_max_lattimer, MAX(0x10, 8 * PCI_MIN_GNT(icr))); 566 if (PCI_LATTIMER(bhlc) < lattimer) { 567 bhlc &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT); 568 bhlc |= (lattimer << PCI_LATTIMER_SHIFT); 569 } 570 571 cardbus_conf_write(cc, cf, tag, PCI_BHLC_REG, bhlc); 572 bhlc = cardbus_conf_read(cc, cf, tag, PCI_BHLC_REG); 573 DPRINTF(("0x%08x\n", bhlc)); 574 575 /* 576 * We need to allocate the ct here, since we might 577 * need it when reading the CIS 578 */ 579 ct = malloc(sizeof(struct cardbus_devfunc), 580 M_DEVBUF, M_WAITOK); 581 ct->ct_bhlc = bhlc; 582 ct->ct_cc = sc->sc_cc; 583 ct->ct_cf = sc->sc_cf; 584 ct->ct_bus = sc->sc_bus; 585 ct->ct_func = function; 586 ct->ct_sc = sc; 587 sc->sc_funcs[function] = ct; 588 589 memset(&ca, 0, sizeof(ca)); 590 591 ca.ca_ct = ct; 592 593 ca.ca_iot = sc->sc_iot; 594 ca.ca_memt = sc->sc_memt; 595 ca.ca_dmat = sc->sc_dmat; 596 597 ca.ca_rbus_iot = sc->sc_rbus_iot; 598 ca.ca_rbus_memt= sc->sc_rbus_memt; 599 600 ca.ca_tag = tag; 601 ca.ca_bus = sc->sc_bus; 602 ca.ca_function = function; 603 ca.ca_id = id; 604 ca.ca_class = class; 605 606 if (cis_ptr != 0) { 607 #define TUPLESIZE 2048 608 u_int8_t *tuple = malloc(TUPLESIZE, M_DEVBUF, M_WAITOK); 609 if (cardbus_read_tuples(&ca, cis_ptr, 610 tuple, TUPLESIZE)) { 611 printf("cardbus_attach_card: " 612 "failed to read CIS\n"); 613 } else { 614 #ifdef CARDBUS_DEBUG 615 decode_tuples(tuple, TUPLESIZE, 616 print_tuple, NULL); 617 #endif 618 decode_tuples(tuple, TUPLESIZE, 619 parse_tuple, &ca.ca_cis); 620 } 621 free(tuple, M_DEVBUF); 622 } 623 624 locs[CARDBUSCF_FUNCTION] = function; 625 626 if ((csc = config_found(sc->sc_dev, &ca, cardbusprint, 627 CFARGS(.submatch = config_stdsubmatch, 628 .locators = locs))) == NULL) { 629 /* do not match */ 630 disable_function(sc, function); 631 sc->sc_funcs[function] = NULL; 632 free(ct, M_DEVBUF); 633 } else { 634 /* found */ 635 ct->ct_device = csc; 636 } 637 } 638 /* 639 * XXX power down pseudo function 8 (this will power down the card 640 * if no functions were attached). 641 */ 642 disable_function(sc, 8); 643 644 return (0); 645 } 646 647 static int 648 cardbusprint(void *aux, const char *pnp) 649 { 650 struct cardbus_attach_args *ca = aux; 651 char devinfo[256]; 652 int i; 653 654 if (pnp) { 655 pci_devinfo(ca->ca_id, ca->ca_class, 1, devinfo, 656 sizeof(devinfo)); 657 for (i = 0; i < 4; i++) { 658 if (ca->ca_cis.cis1_info[i] == NULL) 659 break; 660 if (i) 661 aprint_normal(", "); 662 aprint_normal("%s", ca->ca_cis.cis1_info[i]); 663 } 664 aprint_verbose("%s(manufacturer 0x%x, product 0x%x)", 665 i ? " " : "", 666 ca->ca_cis.manufacturer, ca->ca_cis.product); 667 aprint_normal(" %s at %s", devinfo, pnp); 668 } 669 aprint_normal(" function %d", ca->ca_function); 670 671 return (UNCONF); 672 } 673 674 /* 675 * void cardbus_detach_card(struct cardbus_softc *sc) 676 * 677 * This function detaches the card on the slot: detach device data 678 * structure and turns off the power. 679 * 680 * This function must not be called under interrupt context. 681 */ 682 void 683 cardbus_detach_card(struct cardbus_softc *sc) 684 { 685 int f; 686 struct cardbus_devfunc *ct; 687 688 for (f = 0; f < 8; f++) { 689 ct = sc->sc_funcs[f]; 690 if (!ct) 691 continue; 692 693 DPRINTF(("%s: detaching %s\n", device_xname(sc->sc_dev), 694 device_xname(ct->ct_device))); 695 /* call device detach function */ 696 697 if (config_detach(ct->ct_device, 0) != 0) { 698 aprint_error_dev(sc->sc_dev, 699 "cannot detach dev %s, function %d\n", 700 device_xname(ct->ct_device), ct->ct_func); 701 } 702 } 703 704 sc->sc_poweron_func = 0; 705 (*sc->sc_cf->cardbus_power)(sc->sc_cc, 706 CARDBUS_VCC_0V | CARDBUS_VPP_0V); 707 } 708 709 void 710 cardbus_childdetached(device_t self, device_t child) 711 { 712 struct cardbus_softc *sc = device_private(self); 713 struct cardbus_devfunc *ct; 714 715 ct = sc->sc_funcs[device_locator(child, CARDBUSCF_FUNCTION)]; 716 KASSERT(ct->ct_device == child); 717 718 sc->sc_poweron_func &= ~(1 << ct->ct_func); 719 sc->sc_funcs[ct->ct_func] = NULL; 720 free(ct, M_DEVBUF); 721 } 722 723 void * 724 Cardbus_intr_establish(cardbus_devfunc_t ct, 725 int level, int (*func)(void *), void *arg) 726 { 727 return cardbus_intr_establish(ct->ct_cc, ct->ct_cf, level, func, 728 arg); 729 } 730 731 /* 732 * void *cardbus_intr_establish(cc, cf, irq, level, func, arg) 733 * Interrupt handler of pccard. 734 * args: 735 * cardbus_chipset_tag_t *cc 736 * int irq: 737 */ 738 void * 739 cardbus_intr_establish(cardbus_chipset_tag_t cc, cardbus_function_tag_t cf, 740 int level, int (*func)(void *), void *arg) 741 { 742 743 DPRINTF(("- cardbus_intr_establish\n")); 744 return ((*cf->cardbus_intr_establish)(cc, level, func, arg)); 745 } 746 747 void 748 Cardbus_intr_disestablish(cardbus_devfunc_t ct, void *handler) 749 { 750 cardbus_intr_disestablish(ct->ct_cc, ct->ct_cf, handler); 751 } 752 753 /* 754 * void cardbus_intr_disestablish(cc, cf, handler) 755 * Interrupt handler of pccard. 756 * args: 757 * cardbus_chipset_tag_t *cc 758 */ 759 void 760 cardbus_intr_disestablish(cardbus_chipset_tag_t cc, cardbus_function_tag_t cf, 761 void *handler) 762 { 763 764 DPRINTF(("- pccard_intr_disestablish\n")); 765 (*cf->cardbus_intr_disestablish)(cc, handler); 766 } 767 768 /* 769 * XXX this should be merged with cardbus_function_{enable,disable}, 770 * but we don't have a ct when these functions are called. 771 */ 772 static void 773 enable_function(struct cardbus_softc *sc, int cdstatus, int function) 774 { 775 776 if (sc->sc_poweron_func == 0) { 777 /* switch to 3V and/or wait for power to stabilize */ 778 if (cdstatus & CARDBUS_3V_CARD) { 779 /* 780 * sc_poweron_func must be substituted before 781 * entering sleep, in order to avoid turn on 782 * power twice. 783 */ 784 sc->sc_poweron_func |= (1 << function); 785 (*sc->sc_cf->cardbus_power)(sc->sc_cc, CARDBUS_VCC_3V); 786 } else { 787 /* No cards other than 3.3V cards. */ 788 return; 789 } 790 (*sc->sc_cf->cardbus_ctrl)(sc->sc_cc, CARDBUS_RESET); 791 } 792 sc->sc_poweron_func |= (1 << function); 793 } 794 795 static void 796 disable_function(struct cardbus_softc *sc, int function) 797 { 798 bool no_powerdown; 799 cardbus_devfunc_t ct; 800 device_t dv; 801 int i; 802 803 sc->sc_poweron_func &= ~(1 << function); 804 if (sc->sc_poweron_func != 0) 805 return; 806 for (i = 0; i < __arraycount(sc->sc_funcs); i++) { 807 if ((ct = sc->sc_funcs[i]) == NULL) 808 continue; 809 dv = ct->ct_device; 810 if (prop_dictionary_get_bool(device_properties(dv), 811 "pmf-no-powerdown", &no_powerdown) && no_powerdown) 812 return; 813 } 814 /* power-off because no functions are enabled */ 815 (*sc->sc_cf->cardbus_power)(sc->sc_cc, CARDBUS_VCC_0V); 816 } 817 818 /* 819 * int cardbus_function_enable(struct cardbus_softc *sc, int func) 820 * 821 * This function enables a function on a card. When no power is 822 * applied on the card, power will be applied on it. 823 */ 824 int 825 cardbus_function_enable(struct cardbus_softc *sc, int func) 826 { 827 cardbus_chipset_tag_t cc = sc->sc_cc; 828 cardbus_function_tag_t cf = sc->sc_cf; 829 cardbus_devfunc_t ct; 830 pcireg_t command; 831 pcitag_t tag; 832 833 DPRINTF(("entering cardbus_function_enable... ")); 834 835 /* entering critical area */ 836 837 /* XXX: sc_vold should be used */ 838 enable_function(sc, CARDBUS_3V_CARD, func); 839 840 /* exiting critical area */ 841 842 tag = cardbus_make_tag(cc, cf, sc->sc_bus, func); 843 844 command = cardbus_conf_read(cc, cf, tag, PCI_COMMAND_STATUS_REG); 845 command |= (PCI_COMMAND_MEM_ENABLE | PCI_COMMAND_IO_ENABLE | 846 PCI_COMMAND_MASTER_ENABLE); /* XXX: good guess needed */ 847 848 cardbus_conf_write(cc, cf, tag, PCI_COMMAND_STATUS_REG, command); 849 850 if ((ct = sc->sc_funcs[func]) != NULL) 851 Cardbus_conf_write(ct, tag, PCI_BHLC_REG, ct->ct_bhlc); 852 853 DPRINTF(("%x\n", sc->sc_poweron_func)); 854 855 return (0); 856 } 857 858 /* 859 * int cardbus_function_disable(struct cardbus_softc *, int func) 860 * 861 * This function disable a function on a card. When no functions are 862 * enabled, it turns off the power. 863 */ 864 int 865 cardbus_function_disable(struct cardbus_softc *sc, int func) 866 { 867 868 DPRINTF(("entering cardbus_function_disable... ")); 869 870 disable_function(sc, func); 871 872 return (0); 873 } 874 875 /* 876 * int cardbus_get_capability(cardbus_chipset_tag_t cc, 877 * cardbus_function_tag_t cf, pcitag_t tag, int capid, int *offset, 878 * pcireg_t *value) 879 * 880 * Find the specified PCI capability. 881 */ 882 int 883 cardbus_get_capability(cardbus_chipset_tag_t cc, cardbus_function_tag_t cf, 884 pcitag_t tag, int capid, int *offset, pcireg_t *value) 885 { 886 pcireg_t reg; 887 unsigned int ofs; 888 889 reg = cardbus_conf_read(cc, cf, tag, PCI_COMMAND_STATUS_REG); 890 if (!(reg & PCI_STATUS_CAPLIST_SUPPORT)) 891 return (0); 892 893 ofs = PCI_CAPLIST_PTR(cardbus_conf_read(cc, cf, tag, 894 PCI_CAPLISTPTR_REG)); 895 while (ofs != 0) { 896 #ifdef DIAGNOSTIC 897 if ((ofs & 3) || (ofs < 0x40)) 898 panic("cardbus_get_capability"); 899 #endif 900 reg = cardbus_conf_read(cc, cf, tag, ofs); 901 if (PCI_CAPLIST_CAP(reg) == capid) { 902 if (offset) 903 *offset = ofs; 904 if (value) 905 *value = reg; 906 return (1); 907 } 908 ofs = PCI_CAPLIST_NEXT(reg); 909 } 910 911 return (0); 912 } 913 914 /* 915 * below this line, there are some functions for decoding tuples. 916 * They should go out from this file. 917 */ 918 919 static u_int8_t * 920 decode_tuple(u_int8_t *, u_int8_t *, tuple_decode_func, void *); 921 922 static int 923 decode_tuples(u_int8_t *tuple, int buflen, tuple_decode_func func, void *data) 924 { 925 u_int8_t *tp = tuple; 926 927 if (PCMCIA_CISTPL_LINKTARGET != *tuple) { 928 DPRINTF(("WRONG TUPLE: 0x%x\n", *tuple)); 929 return (0); 930 } 931 932 while ((tp = decode_tuple(tp, tuple + buflen, func, data)) != NULL) 933 ; 934 935 return (1); 936 } 937 938 static u_int8_t * 939 decode_tuple(u_int8_t *tuple, u_int8_t *end, 940 tuple_decode_func func, void *data) 941 { 942 u_int8_t type; 943 u_int8_t len; 944 945 type = tuple[0]; 946 switch (type) { 947 case PCMCIA_CISTPL_NULL: 948 case PCMCIA_CISTPL_END: 949 len = 1; 950 break; 951 default: 952 if (tuple + 2 > end) 953 return (NULL); 954 len = tuple[1] + 2; 955 break; 956 } 957 958 if (tuple + len > end) 959 return (NULL); 960 961 (*func)(tuple, len, data); 962 963 if (type == PCMCIA_CISTPL_END || tuple + len == end) 964 return (NULL); 965 966 return (tuple + len); 967 } 968 969 /* 970 * XXX: this is another reason why this code should be shared with PCI. 971 */ 972 static int 973 cardbus_get_powerstate_int(cardbus_devfunc_t ct, pcitag_t tag, 974 pcireg_t *state, int offset) 975 { 976 pcireg_t value, now; 977 cardbus_chipset_tag_t cc = ct->ct_cc; 978 cardbus_function_tag_t cf = ct->ct_cf; 979 980 value = cardbus_conf_read(cc, cf, tag, offset + PCI_PMCSR); 981 now = value & PCI_PMCSR_STATE_MASK; 982 switch (now) { 983 case PCI_PMCSR_STATE_D0: 984 case PCI_PMCSR_STATE_D1: 985 case PCI_PMCSR_STATE_D2: 986 case PCI_PMCSR_STATE_D3: 987 *state = now; 988 return 0; 989 default: 990 return EINVAL; 991 } 992 } 993 994 int 995 cardbus_get_powerstate(cardbus_devfunc_t ct, pcitag_t tag, pcireg_t *state) 996 { 997 cardbus_chipset_tag_t cc = ct->ct_cc; 998 cardbus_function_tag_t cf = ct->ct_cf; 999 int offset; 1000 pcireg_t value; 1001 1002 if (!cardbus_get_capability(cc, cf, tag, PCI_CAP_PWRMGMT, &offset, &value)) 1003 return EOPNOTSUPP; 1004 1005 return cardbus_get_powerstate_int(ct, tag, state, offset); 1006 } 1007 1008 static int 1009 cardbus_set_powerstate_int(cardbus_devfunc_t ct, pcitag_t tag, 1010 pcireg_t state, int offset, pcireg_t cap_reg) 1011 { 1012 cardbus_chipset_tag_t cc = ct->ct_cc; 1013 cardbus_function_tag_t cf = ct->ct_cf; 1014 1015 pcireg_t value, cap, now; 1016 1017 KASSERT((offset & 0x3) == 0); 1018 1019 cap = cap_reg >> PCI_PMCR_SHIFT; 1020 value = cardbus_conf_read(cc, cf, tag, offset + PCI_PMCSR); 1021 now = value & PCI_PMCSR_STATE_MASK; 1022 value &= ~PCI_PMCSR_STATE_MASK; 1023 1024 if (now == state) 1025 return 0; 1026 switch (state) { 1027 case PCI_PMCSR_STATE_D0: 1028 break; 1029 case PCI_PMCSR_STATE_D1: 1030 if (now == PCI_PMCSR_STATE_D2 || now == PCI_PMCSR_STATE_D3) { 1031 printf("invalid transition from %d to D1\n", (int)now); 1032 return EINVAL; 1033 } 1034 if (!(cap & PCI_PMCR_D1SUPP)) { 1035 printf("D1 not supported\n"); 1036 return EOPNOTSUPP; 1037 } 1038 break; 1039 case PCI_PMCSR_STATE_D2: 1040 if (now == PCI_PMCSR_STATE_D3) { 1041 printf("invalid transition from %d to D2\n", (int)now); 1042 return EINVAL; 1043 } 1044 if (!(cap & PCI_PMCR_D2SUPP)) { 1045 printf("D2 not supported\n"); 1046 return EOPNOTSUPP; 1047 } 1048 break; 1049 case PCI_PMCSR_STATE_D3: 1050 break; 1051 default: 1052 return EINVAL; 1053 } 1054 value |= state; 1055 cardbus_conf_write(cc, cf, tag, offset + PCI_PMCSR, value); 1056 if (state == PCI_PMCSR_STATE_D3 || now == PCI_PMCSR_STATE_D3) 1057 DELAY(10000); 1058 else if (state == PCI_PMCSR_STATE_D2 || now == PCI_PMCSR_STATE_D2) 1059 DELAY(200); 1060 1061 return 0; 1062 } 1063 1064 int 1065 cardbus_set_powerstate(cardbus_devfunc_t ct, pcitag_t tag, pcireg_t state) 1066 { 1067 cardbus_chipset_tag_t cc = ct->ct_cc; 1068 cardbus_function_tag_t cf = ct->ct_cf; 1069 int offset; 1070 pcireg_t value; 1071 1072 if (!cardbus_get_capability(cc, cf, tag, PCI_CAP_PWRMGMT, &offset, 1073 &value)) 1074 return EOPNOTSUPP; 1075 1076 return cardbus_set_powerstate_int(ct, tag, state, offset, value); 1077 } 1078 1079 #ifdef CARDBUS_DEBUG 1080 static const char *tuple_name(int); 1081 static const char *tuple_names[] = { 1082 "TPL_NULL", "TPL_DEVICE", "Reserved", "Reserved", /* 0-3 */ 1083 "CONFIG_CB", "CFTABLE_ENTRY_CB", "Reserved", "BAR", /* 4-7 */ 1084 "Reserved", "Reserved", "Reserved", "Reserved", /* 8-B */ 1085 "Reserved", "Reserved", "Reserved", "Reserved", /* C-F */ 1086 "CHECKSUM", "LONGLINK_A", "LONGLINK_C", "LINKTARGET", /* 10-13 */ 1087 "NO_LINK", "VERS_1", "ALTSTR", "DEVICE_A", 1088 "JEDEC_C", "JEDEC_A", "CONFIG", "CFTABLE_ENTRY", 1089 "DEVICE_OC", "DEVICE_OA", "DEVICE_GEO", "DEVICE_GEO_A", 1090 "MANFID", "FUNCID", "FUNCE", "SWIL", /* 20-23 */ 1091 "Reserved", "Reserved", "Reserved", "Reserved", /* 24-27 */ 1092 "Reserved", "Reserved", "Reserved", "Reserved", /* 28-2B */ 1093 "Reserved", "Reserved", "Reserved", "Reserved", /* 2C-2F */ 1094 "Reserved", "Reserved", "Reserved", "Reserved", /* 30-33 */ 1095 "Reserved", "Reserved", "Reserved", "Reserved", /* 34-37 */ 1096 "Reserved", "Reserved", "Reserved", "Reserved", /* 38-3B */ 1097 "Reserved", "Reserved", "Reserved", "Reserved", /* 3C-3F */ 1098 "VERS_2", "FORMAT", "GEOMETRY", "BYTEORDER", 1099 "DATE", "BATTERY", "ORG" 1100 }; 1101 #define NAME_LEN(x) (sizeof x / sizeof(x[0])) 1102 1103 static const char * 1104 tuple_name(int type) 1105 { 1106 1107 if (0 <= type && type < NAME_LEN(tuple_names)) { 1108 return (tuple_names[type]); 1109 } else if (type == 0xff) { 1110 return ("END"); 1111 } else { 1112 return ("Reserved"); 1113 } 1114 } 1115 1116 static void 1117 print_tuple(u_int8_t *tuple, int len, void *data) 1118 { 1119 int i; 1120 1121 printf("tuple: %s len %d\n", tuple_name(tuple[0]), len); 1122 1123 for (i = 0; i < len; ++i) { 1124 if (i % 16 == 0) { 1125 printf(" 0x%2x:", i); 1126 } 1127 printf(" %x", tuple[i]); 1128 if (i % 16 == 15) { 1129 printf("\n"); 1130 } 1131 } 1132 if (i % 16 != 0) { 1133 printf("\n"); 1134 } 1135 } 1136 #endif 1137 1138 void 1139 cardbus_conf_capture(cardbus_chipset_tag_t cc, cardbus_function_tag_t cf, 1140 pcitag_t tag, struct cardbus_conf_state *pcs) 1141 { 1142 int off; 1143 1144 for (off = 0; off < 16; off++) 1145 pcs->reg[off] = cardbus_conf_read(cc, cf, tag, (off * 4)); 1146 } 1147 1148 void 1149 cardbus_conf_restore(cardbus_chipset_tag_t cc, cardbus_function_tag_t cf, 1150 pcitag_t tag, struct cardbus_conf_state *pcs) 1151 { 1152 int off; 1153 pcireg_t val; 1154 1155 for (off = 15; off >= 0; off--) { 1156 val = cardbus_conf_read(cc, cf, tag, (off * 4)); 1157 if (val != pcs->reg[off]) 1158 cardbus_conf_write(cc, cf,tag, (off * 4), pcs->reg[off]); 1159 } 1160 } 1161 1162 struct cardbus_child_power { 1163 struct cardbus_conf_state p_cardbusconf; 1164 cardbus_devfunc_t p_ct; 1165 pcitag_t p_tag; 1166 cardbus_chipset_tag_t p_cc; 1167 cardbus_function_tag_t p_cf; 1168 pcireg_t p_pm_cap; 1169 bool p_has_pm; 1170 int p_pm_offset; 1171 }; 1172 1173 static bool 1174 cardbus_child_suspend(device_t dv, const pmf_qual_t *qual) 1175 { 1176 struct cardbus_child_power *priv = device_pmf_bus_private(dv); 1177 1178 cardbus_conf_capture(priv->p_cc, priv->p_cf, priv->p_tag, 1179 &priv->p_cardbusconf); 1180 1181 if (priv->p_has_pm && 1182 cardbus_set_powerstate_int(priv->p_ct, priv->p_tag, 1183 PCI_PMCSR_STATE_D3, priv->p_pm_offset, priv->p_pm_cap)) { 1184 aprint_error_dev(dv, "unsupported state, continuing.\n"); 1185 return false; 1186 } 1187 1188 Cardbus_function_disable(priv->p_ct); 1189 1190 return true; 1191 } 1192 1193 static bool 1194 cardbus_child_resume(device_t dv, const pmf_qual_t *qual) 1195 { 1196 struct cardbus_child_power *priv = device_pmf_bus_private(dv); 1197 1198 Cardbus_function_enable(priv->p_ct); 1199 1200 if (priv->p_has_pm && 1201 cardbus_set_powerstate_int(priv->p_ct, priv->p_tag, 1202 PCI_PMCSR_STATE_D0, priv->p_pm_offset, priv->p_pm_cap)) { 1203 aprint_error_dev(dv, "unsupported state, continuing.\n"); 1204 return false; 1205 } 1206 1207 cardbus_conf_restore(priv->p_cc, priv->p_cf, priv->p_tag, 1208 &priv->p_cardbusconf); 1209 1210 return true; 1211 } 1212 1213 static void 1214 cardbus_child_deregister(device_t dv) 1215 { 1216 struct cardbus_child_power *priv = device_pmf_bus_private(dv); 1217 1218 free(priv, M_DEVBUF); 1219 } 1220 1221 static void 1222 cardbus_child_register(device_t child) 1223 { 1224 device_t self = device_parent(child); 1225 struct cardbus_softc *sc = device_private(self); 1226 struct cardbus_devfunc *ct; 1227 struct cardbus_child_power *priv; 1228 int off; 1229 pcireg_t reg; 1230 1231 ct = sc->sc_funcs[device_locator(child, CARDBUSCF_FUNCTION)]; 1232 1233 priv = malloc(sizeof(*priv), M_DEVBUF, M_WAITOK); 1234 1235 priv->p_ct = ct; 1236 priv->p_cc = ct->ct_cc; 1237 priv->p_cf = ct->ct_cf; 1238 priv->p_tag = cardbus_make_tag(priv->p_cc, priv->p_cf, ct->ct_bus, 1239 ct->ct_func); 1240 1241 if (cardbus_get_capability(priv->p_cc, priv->p_cf, priv->p_tag, 1242 PCI_CAP_PWRMGMT, &off, ®)) { 1243 priv->p_has_pm = true; 1244 priv->p_pm_offset = off; 1245 priv->p_pm_cap = reg; 1246 } else { 1247 priv->p_has_pm = false; 1248 priv->p_pm_offset = -1; 1249 } 1250 1251 device_pmf_bus_register(child, priv, cardbus_child_suspend, 1252 cardbus_child_resume, 0, cardbus_child_deregister); 1253 } 1254
Indexes created Sat Sep 20 22:09:52 GMT 2025