| /xsrc/external/mit/fontconfig/dist/test/ |
| test-bz1744377.c | 39 FcConfig *cfg = FcConfigCreate (); local
41 if (!FcConfigParseAndLoadFromMemory (cfg, doc, FcTrue))
43 if (FcConfigParseAndLoadFromMemory (cfg, doc2, FcTrue))
45 if (!FcConfigParseAndLoadFromMemory (cfg, doc2, FcFalse))
48 FcConfigDestroy (cfg);
|
| test-issue180.c | 41 FcConfig *cfg = FcConfigCreate (); local
45 if (!FcConfigParseAndLoadFromMemory (cfg, doc, FcTrue))
50 l = FcConfigGetCacheDirs (cfg);
57 FcConfigDestroy (cfg);
59 cfg = FcConfigCreate ();
60 if (!FcConfigParseAndLoadFromMemory (cfg, doc2, FcTrue))
65 l = FcConfigGetCacheDirs (cfg);
72 FcConfigDestroy (cfg);
|
| /xsrc/external/mit/MesaLib/dist/src/intel/ds/ |
| intel_pps_perf.h | 51 struct intel_perf_config *cfg = nullptr; member in class:pps::IntelPerf
|
| /xsrc/external/mit/MesaLib/dist/src/intel/vulkan/ |
| genX_gpu_memcpy.c | 76 const struct intel_l3_config *cfg = local
78 genX(cmd_buffer_config_l3)(cmd_buffer, cfg);
|
| /xsrc/external/mit/MesaLib.old/dist/src/glx/ |
| create_context.c | 42 struct glx_config *const cfg = (struct glx_config *) config; local
52 if (dpy == NULL || cfg == NULL)
59 psc = GetGLXScreenConfigs(dpy, cfg->screen);
63 assert(cfg->screen == psc->scr);
78 gc = psc->vtable->create_context_attribs(psc, cfg, share, num_attribs,
85 gc = applegl_create_context(psc, cfg, share, 0);
87 gc = indirect_create_context_attribs(psc, cfg, share, num_attribs,
107 cfg->fbconfigID,
108 cfg->screen,
|
| /xsrc/external/mit/MesaLib.old/dist/src/intel/vulkan/ |
| genX_gpu_memcpy.c | 76 const struct gen_l3_config *cfg = local
78 genX(cmd_buffer_config_l3)(cmd_buffer, cfg);
|
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/etnaviv/ |
| etnaviv_perfmon.c | 428 const struct etna_perfmon_config *cfg = &query_config[i]; local
430 if (!etna_pm_cfg_supported(screen->perfmon, cfg))
|
| etnaviv_query_acc_perfmon.c | 52 const struct etna_perfmon_config *cfg)
54 struct etna_perfmon_signal *signal = etna_pm_query_signal(perfmon, cfg->source);
105 const struct etna_perfmon_config *cfg; local
107 cfg = etna_pm_query_config(query_type);
108 if (!cfg)
111 if (!etna_pm_cfg_supported(ctx->screen->perfmon, cfg))
118 pm_add_signal(pq, ctx->screen->perfmon, cfg);
|
| /xsrc/external/mit/MesaLib/dist/src/glx/ |
| create_context.c | 50 struct glx_config *const cfg = (struct glx_config *) config; local
72 if (cfg) {
73 screen = cfg->screen;
100 gc = psc->vtable->create_context_attribs(psc, cfg, share, num_attribs,
107 gc = applegl_create_context(psc, cfg, share, 0);
109 gc = indirect_create_context_attribs(psc, cfg, share, num_attribs,
129 cfg ? cfg->fbconfigID : 0,
|
| /xsrc/external/mit/MesaLib/dist/src/intel/compiler/ |
| brw_disasm_info.h | 45 /* Pointers to the basic block in the CFG if the instruction group starts
60 const struct cfg_t *cfg; member in struct:disasm_info
62 /** Block index in the cfg. */
73 const struct cfg_t *cfg);
|
| brw_disasm_info.c | 108 const struct cfg_t *cfg)
113 disasm->cfg = cfg;
133 const struct cfg_t *cfg = disasm->cfg; local
149 if (bblock_start(cfg->blocks[disasm->cur_block]) == inst) {
150 group->block_start = cfg->blocks[disasm->cur_block];
165 if (bblock_end(cfg->blocks[disasm->cur_block]) == inst) {
166 group->block_end = cfg->blocks[disasm->cur_block];
|
| brw_fs_live_variables.h | 142 const cfg_t *cfg; member in class:brw::fs_live_variables
|
| brw_vec4_live_variables.h | 106 cfg_t *cfg; member in class:brw::vec4_live_variables
|
| /xsrc/external/mit/MesaLib.old/dist/src/intel/compiler/ |
| brw_disasm_info.h | 45 /* Pointers to the basic block in the CFG if the instruction group starts
60 const struct cfg_t *cfg; member in struct:disasm_info
62 /** Block index in the cfg. */
72 const struct cfg_t *cfg);
|
| brw_vec4_live_variables.h | 66 vec4_live_variables(const simple_allocator &alloc, cfg_t *cfg);
80 cfg_t *cfg; member in class:brw::vec4_live_variables
|
| /xsrc/external/mit/libepoxy/dist/test/ |
| egl_gl.c | 92 EGLConfig cfg; local
101 if (!eglChooseConfig(dpy, config_attribs, &cfg, 1, &count))
104 ctx = eglCreateContext(dpy, cfg, NULL, context_attribs);
|
| egl_epoxy_api.c | 99 EGLConfig cfg; local
108 if (!eglChooseConfig(dpy, config_attribs, &cfg, 1, &count))
111 ctx = eglCreateContext(dpy, cfg, NULL, context_attribs);
|
| egl_without_glx.c | 129 EGLConfig cfg; local
150 if (!eglChooseConfig(dpy, config_attribs, &cfg, 1, &count))
153 ctx = eglCreateContext(dpy, cfg, NULL, context_attribs);
|
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/nouveau/nv50/ |
| nv50_query_hw_metric.c | 154 const struct nv50_hw_metric_query_cfg *cfg; local
170 cfg = nv50_hw_metric_query_get_cfg(nv50, hq);
172 for (i = 0; i < cfg->num_queries; i++) {
173 hmq->queries[i] = nv50_hw_sm_create_query(nv50, cfg->queries[i]);
|
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/nouveau/nvc0/ |
| nvc0_video.c | 97 union nouveau_bo_config cfg; local
100 cfg.nvc0.tile_mode = 0x10;
101 cfg.nvc0.memtype = 0xfe;
204 0, 1 << 20, &cfg, &dec->bsp_bo[i]);
209 0x100, inter_size, &cfg, &dec->inter_bo[0]);
213 0x100, dec->inter_bo[0]->size, &cfg,
250 0x4000, &cfg, &dec->fw_bo);
261 0x400, &cfg, &dec->bitplane_bo);
269 &cfg, &dec->ref_bo);
|
| nvc0_video_bsp.c | 68 union nouveau_bo_config cfg; local
71 cfg.nvc0.tile_mode = 0x10;
72 cfg.nvc0.memtype = 0xfe;
78 ret = nouveau_bo_new(dec->client->device, NOUVEAU_BO_VRAM, 0, bsp_size, &cfg, &tmp_bo);
104 union nouveau_bo_config cfg; local
107 cfg.nvc0.tile_mode = 0x10;
108 cfg.nvc0.memtype = 0xfe;
110 ret = nouveau_bo_new(dec->client->device, NOUVEAU_BO_VRAM, 0, bsp_bo->size * 4, &cfg, &tmp_bo);
|
| /xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/i965/ |
| gfx7_l3_state.c | 71 setup_l3_config(struct brw_context *brw, const struct intel_l3_config *cfg)
74 const bool has_dc = cfg->n[INTEL_L3P_DC] || cfg->n[INTEL_L3P_ALL];
75 const bool has_is = cfg->n[INTEL_L3P_IS] || cfg->n[INTEL_L3P_RO] ||
76 cfg->n[INTEL_L3P_ALL];
77 const bool has_c = cfg->n[INTEL_L3P_C] || cfg->n[INTEL_L3P_RO] ||
78 cfg->n[INTEL_L3P_ALL];
79 const bool has_t = cfg->n[INTEL_L3P_T] || cfg->n[INTEL_L3P_RO] |
238 const struct intel_l3_config *const cfg = local
304 const struct intel_l3_config *const cfg = intel_get_default_l3_config(devinfo); local
[all...] |
| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/nouveau/nv50/ |
| nv50_query_hw_metric.c | 154 const struct nv50_hw_metric_query_cfg *cfg; local
170 cfg = nv50_hw_metric_query_get_cfg(nv50, hq);
172 for (i = 0; i < cfg->num_queries; i++) {
173 hmq->queries[i] = nv50_hw_sm_create_query(nv50, cfg->queries[i]);
|
| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/nouveau/nvc0/ |
| nvc0_video.c | 97 union nouveau_bo_config cfg; local
100 cfg.nvc0.tile_mode = 0x10;
101 cfg.nvc0.memtype = 0xfe;
204 0, 1 << 20, &cfg, &dec->bsp_bo[i]);
209 0x100, inter_size, &cfg, &dec->inter_bo[0]);
213 0x100, dec->inter_bo[0]->size, &cfg,
250 0x4000, &cfg, &dec->fw_bo);
261 0x400, &cfg, &dec->bitplane_bo);
269 &cfg, &dec->ref_bo);
|
| nvc0_video_bsp.c | 68 union nouveau_bo_config cfg; local
71 cfg.nvc0.tile_mode = 0x10;
72 cfg.nvc0.memtype = 0xfe;
78 ret = nouveau_bo_new(dec->client->device, NOUVEAU_BO_VRAM, 0, bsp_size, &cfg, &tmp_bo);
104 union nouveau_bo_config cfg; local
107 cfg.nvc0.tile_mode = 0x10;
108 cfg.nvc0.memtype = 0xfe;
110 ret = nouveau_bo_new(dec->client->device, NOUVEAU_BO_VRAM, 0, bsp_bo->size * 4, &cfg, &tmp_bo);
|
