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    Searched defs:cfgcr0 (Results 1 - 2 of 2) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/i915/display/
intel_dpll_mgr.h 193 u32 cfgcr0; member in struct:intel_dpll_hw_state
201 * u32 cfgcr0, cfgcr1;
intel_dpll_mgr.c 2047 val = pll->state.hw_state.cfgcr0;
2055 if (pll->state.hw_state.cfgcr0 & DPLL_CFGCR0_HDMI_MODE) {
2165 hw_state->cfgcr0 = val;
2329 u32 cfgcr0, cfgcr1; local in function:cnl_ddi_hdmi_pll_dividers
2332 cfgcr0 = DPLL_CFGCR0_HDMI_MODE;
2337 cfgcr0 |= DPLL_CFGCR0_DCO_FRACTION(wrpll_params.dco_fraction) |
2349 crtc_state->dpll_hw_state.cfgcr0 = cfgcr0;
2357 u32 cfgcr0; local in function:cnl_ddi_dp_set_dpll_hw_state
2359 cfgcr0 = DPLL_CFGCR0_SSC_ENABLE
2623 u32 cfgcr0, cfgcr1; local in function:icl_calc_dpll_state
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