/src/sys/external/gpl2/dts/dist/arch/mips/boot/dts/ingenic/ |
jz4740.dtsi | 2 #include <dt-bindings/clock/jz4740-cgu.h> 19 clocks = <&cgu JZ4740_CLK_CCLK>; 53 cgu: jz4740-cgu@10000000 { label 54 compatible = "ingenic,jz4740-cgu"; 72 clocks = <&cgu JZ4740_CLK_RTC>, 73 <&cgu JZ4740_CLK_EXT>, 74 <&cgu JZ4740_CLK_PCLK>, 75 <&cgu JZ4740_CLK_TCU>; 114 clocks = <&cgu JZ4740_CLK_RTC> [all...] |
jz4725b.dtsi | 2 #include <dt-bindings/clock/jz4725b-cgu.h> 19 clocks = <&cgu JZ4725B_CLK_CCLK>; 53 cgu: clock-controller@10000000 { label 54 compatible = "ingenic,jz4725b-cgu"; 72 clocks = <&cgu JZ4725B_CLK_RTC>, 73 <&cgu JZ4725B_CLK_EXT>, 74 <&cgu JZ4725B_CLK_PCLK>, 75 <&cgu JZ4725B_CLK_TCU>; 123 clocks = <&cgu JZ4725B_CLK_RTC>; 201 clocks = <&cgu JZ4725B_CLK_AIC> [all...] |
jz4770.dtsi | 2 #include <dt-bindings/clock/jz4770-cgu.h> 19 clocks = <&cgu JZ4770_CLK_CCLK>; 53 cgu: jz4770-cgu@10000000 { label 54 compatible = "ingenic,jz4770-cgu", "simple-mfd"; 69 clocks = <&cgu JZ4770_CLK_OTG_PHY>; 84 clocks = <&cgu JZ4770_CLK_RTC>, 85 <&cgu JZ4770_CLK_EXT>, 86 <&cgu JZ4770_CLK_PCLK>; 241 clocks = <&cgu JZ4770_CLK_AIC>, <&cgu JZ4770_CLK_I2S> [all...] |
jz4780.dtsi | 2 #include <dt-bindings/clock/jz4780-cgu.h> 20 clocks = <&cgu JZ4780_CLK_CPU>; 29 clocks = <&cgu JZ4780_CLK_CORE1>; 63 cgu: jz4780-cgu@10000000 { label 64 compatible = "ingenic,jz4780-cgu", "simple-mfd"; 79 clocks = <&cgu JZ4780_CLK_OTG1>; 105 clocks = <&cgu JZ4780_CLK_RTCLK>, 106 <&cgu JZ4780_CLK_EXCLK>, 107 <&cgu JZ4780_CLK_PCLK> [all...] |
x1000.dtsi | 3 #include <dt-bindings/clock/x1000-cgu.h> 20 clocks = <&cgu X1000_CLK_CPU>; 54 cgu: x1000-cgu@10000000 { label 55 compatible = "ingenic,x1000-cgu", "simple-mfd"; 70 clocks = <&cgu X1000_CLK_OTGPHY>; 96 clocks = <&cgu X1000_CLK_OST>; 112 clocks = <&cgu X1000_CLK_RTCLK>, 113 <&cgu X1000_CLK_EXCLK>, 114 <&cgu X1000_CLK_PCLK> [all...] |
x1830.dtsi | 3 #include <dt-bindings/clock/x1830-cgu.h> 20 clocks = <&cgu X1830_CLK_CPU>; 54 cgu: x1830-cgu@10000000 { label 55 compatible = "ingenic,x1830-cgu", "simple-mfd"; 70 clocks = <&cgu X1830_CLK_OTGPHY>; 89 clocks = <&cgu X1830_CLK_OST>; 105 clocks = <&cgu X1830_CLK_RTCLK>, 106 <&cgu X1830_CLK_EXCLK>, 107 <&cgu X1830_CLK_PCLK> [all...] |
/src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/ |
lpc18xx.dtsi | 16 #include "dt-bindings/clock/lpc18xx-cgu.h" 165 clocks = <&cgu BASE_LCD_CLK>, <&ccu1 CLK_CPU_LCD>; 232 cgu: clock-controller@40050000 { label 233 compatible = "nxp,lpc1850-cgu"; 243 clocks = <&cgu BASE_APB3_CLK>, <&cgu BASE_APB1_CLK>, 244 <&cgu BASE_SPIFI_CLK>, <&cgu BASE_CPU_CLK>, 245 <&cgu BASE_PERIPH_CLK>, <&cgu BASE_USB0_CLK> [all...] |
/src/sys/dev/ |
cgd.c | 1390 struct cgd_user *cgu; local in function:cgd_ioctl_get 1394 cgu = (struct cgd_user *)data; 1402 if (cgu->cgu_unit == -1) 1403 cgu->cgu_unit = unit; 1405 if (cgu->cgu_unit < 0) 1414 cgu->cgu_dev = 0; 1415 cgu->cgu_alg[0] = '\0'; 1416 cgu->cgu_blocksize = 0; 1417 cgu->cgu_mode = 0; 1418 cgu->cgu_keylen = 0 [all...] |
/src/sbin/cgdconfig/ |
cgdconfig.c | 766 struct cgd_user cgu; local in function:configure 768 cgu.cgu_unit = -1; 769 if (prog_ioctl(fd, CGDIOCGET, &cgu) != -1 && cgu.cgu_dev != 0) { 1623 struct cgd_user cgu; local in function:show 1632 cgu.cgu_unit = -1; 1633 if (prog_ioctl(fd, CGDIOCGET, &cgu) == -1) { 1640 if (cgu.cgu_dev == 0) { 1645 dev = devname(cgu.cgu_dev, S_IFBLK); 1650 (unsigned long long)major(cgu.cgu_dev) [all...] |