| /src/sys/external/bsd/drm2/dist/drm/nouveau/include/nvif/ |
| cl006b.h | 9 __u8 chid; member in struct:nv03_channel_dma_v0
|
| cl506e.h | 9 __u8 chid; member in struct:nv50_channel_dma_v0
|
| cl506f.h | 9 __u8 chid; member in struct:nv50_channel_gpfifo_v0
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| cl826e.h | 9 __u8 chid; member in struct:g82_channel_dma_v0
|
| cl826f.h | 9 __u8 chid; member in struct:g82_channel_gpfifo_v0
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| cl906f.h | 9 __u8 chid; member in struct:fermi_channel_gpfifo_v0
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| cla06f.h | 10 __u16 chid; member in struct:kepler_channel_gpfifo_a_v0
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| clc36f.h | 10 __u16 chid; member in struct:volta_channel_gpfifo_a_v0
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/gr/ |
| nv20.h | 30 int chid; member in struct:nv20_gr_chan
|
| nouveau_nvkm_engine_gr_nv20.c | 29 nvkm_wo32(gr->ctxtab, chan->chid * 4, inst >> 4);
41 int chid = -1; local in function:nv20_gr_chan_fini
45 chid = (nvkm_rd32(device, 0x400148) & 0x1f000000) >> 24;
46 if (chan->chid == chid) {
59 nvkm_wo32(gr->ctxtab, chan->chid * 4, 0x00000000);
91 chan->chid = fifoch->chid;
101 nvkm_wo32(chan->inst, 0x0000, 0x00000001 | (chan->chid << 24));
195 u32 chid = (addr & 0x01f00000) >> 20 local in function:nv20_gr_intr
[all...] |
| nouveau_nvkm_engine_gr_nv50.c | 401 int chid, u64 inst, const char *name)
441 chid, inst, name, subc, class, mthd,
466 "40084c %08x\n", chid, inst, name,
643 int chid = -1; local in function:nv50_gr_intr
648 chid = chan->chid;
660 if (!nv50_gr_trap_handler(gr, show, chid, (u64)inst << 12, name))
673 stat, msg, chid, (u64)inst << 12, name,
|
| nouveau_nvkm_engine_gr_nv04.c | 367 int chid; member in struct:nv04_gr_chan
1082 int chid = nvkm_rd32(device, NV04_PGRAPH_CTX_USER) >> 24; local in function:nv04_gr_channel
1083 if (chid < ARRAY_SIZE(gr->chan))
1084 chan = gr->chan[chid];
1090 nv04_gr_load_context(struct nv04_gr_chan *chan, int chid)
1099 nvkm_mask(device, NV04_PGRAPH_CTX_USER, 0xff000000, chid << 24);
1124 int chid; local in function:nv04_gr_context_switch
1134 chid = (nvkm_rd32(device, NV04_PGRAPH_TRAPPED_ADDR) >> 24) & 0x0f;
1135 next = gr->chan[chid];
1137 nv04_gr_load_context(next, chid);
1286 u32 chid = (addr & 0x0f000000) >> 24; local in function:nv04_gr_intr
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/nouveau/include/nvkm/core/ |
| ramht.h | 11 int chid; member in struct:nvkm_ramht_data
28 int chid, int addr, u32 handle, u32 context);
31 nvkm_ramht_search(struct nvkm_ramht *, int chid, u32 handle);
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/disp/ |
| channv50.h | 19 } chid; member in struct:nv50_disp_chan
42 struct nv50_disp *, int chid, int head, u64 push,
77 struct nv50_disp *, int chid,
82 struct nv50_disp *, int chid,
87 struct nv50_disp *, int chid,
|
| nouveau_nvkm_engine_disp_gf119.c | 95 gf119_disp_intr_error(struct nv50_disp *disp, int chid)
99 u32 stat = nvkm_rd32(device, 0x6101f0 + (chid * 12));
102 u32 data = nvkm_rd32(device, 0x6101f4 + (chid * 12));
103 u32 code = nvkm_rd32(device, 0x6101f8 + (chid * 12));
107 nvkm_error(subdev, "chid %d stat %08x reason %d [%s] mthd %04x "
109 chid, stat, type, reason ? reason->name : "",
112 if (chid < ARRAY_SIZE(disp->chan)) {
115 nv50_disp_chan_mthd(disp->chan[chid], NV_DBG_ERROR);
122 nvkm_wr32(device, 0x61009c, (1 << chid));
123 nvkm_wr32(device, 0x6101f0 + (chid * 12), 0x90000000)
137 int chid = __ffs(stat); stat &= ~(1 << chid); local in function:gf119_disp_intr
146 int chid = ffs(stat) - 1; local in function:gf119_disp_intr
[all...] |
| nouveau_nvkm_engine_disp_nv50.c | 619 nv50_disp_intr_error(struct nv50_disp *disp, int chid)
623 u32 data = nvkm_rd32(device, 0x610084 + (chid * 0x08));
624 u32 addr = nvkm_rd32(device, 0x610080 + (chid * 0x08));
634 "ERROR %d [%s] %02x [%s] chid %d mthd %04x data %08x\n",
636 chid, mthd, data);
638 if (chid < ARRAY_SIZE(disp->chan)) {
641 nv50_disp_chan_mthd(disp->chan[chid], NV_DBG_ERROR);
648 nvkm_wr32(device, 0x610020, 0x00010000 << chid);
649 nvkm_wr32(device, 0x610080 + (chid * 0x08), 0x90000000);
660 u32 chid = __ffs(intr0 & 0x001f0000) - 16 local in function:nv50_disp_intr
666 u32 chid = __ffs(intr0 & 0x0000001f); local in function:nv50_disp_intr
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/fifo/ |
| nouveau_nvkm_engine_fifo_chang84.c | 120 chan->base.chid, chan->base.object.client->name);
216 u32 chid = chan->base.chid; local in function:g84_fifo_chan_init
218 nvkm_wr32(device, 0x002600 + (chid * 4), 0x80000000 | addr);
|
| nouveau_nvkm_engine_fifo_channv50.c | 86 chan->base.chid, chan->base.object.client->name);
189 u32 chid = chan->base.chid; local in function:nv50_fifo_chan_fini
192 nvkm_mask(device, 0x002600 + (chid * 4), 0x80000000, 0x00000000);
194 nvkm_wr32(device, 0x002600 + (chid * 4), 0x00000000);
204 u32 chid = chan->base.chid; local in function:nv50_fifo_chan_init
206 nvkm_wr32(device, 0x002600 + (chid * 4), 0x80000000 | addr);
|
| nouveau_nvkm_engine_fifo_dmanv40.c | 73 int chid; local in function:nv40_fifo_dma_engine_fini
81 chid = nvkm_rd32(device, 0x003204) & (fifo->base.nr - 1);
82 if (chid == chan->base.chid)
103 int chid; local in function:nv40_fifo_dma_engine_init
112 chid = nvkm_rd32(device, 0x003204) & (fifo->base.nr - 1);
113 if (chid == chan->base.chid)
153 u32 context = chan->base.chid << 23;
168 hash = nvkm_ramht_insert(imem->ramht, object, chan->base.chid, 4
[all...] |
| nouveau_nvkm_engine_fifo_dmanv04.c | 57 u32 context = 0x80000000 | chan->base.chid << 24;
72 hash = nvkm_ramht_insert(imem->ramht, object, chan->base.chid, 4,
89 u32 chid; local in function:nv04_fifo_dma_fini
96 chid = nvkm_rd32(device, NV03_PFIFO_CACHE1_PUSH1) & mask;
97 if (chid == chan->base.chid) {
126 nvkm_mask(device, NV04_PFIFO_MODE, 1 << chan->base.chid, 0);
137 u32 mask = 1 << chan->base.chid;
207 args->v0.chid = chan->base.chid;
[all...] |
| nouveau_nvkm_engine_fifo_nv04.c | 113 nv04_fifo_swmthd(struct nvkm_device *device, u32 chid, u32 addr, u32 data)
132 handled = nvkm_sw_mthd(sw, chid, subc, mthd, data);
142 nv04_fifo_cache_error(struct nv04_fifo *fifo, u32 chid, u32 get)
168 !nv04_fifo_swmthd(device, chid, mthd, data)) {
169 chan = nvkm_fifo_chan_chid(&fifo->base, chid, &flags);
172 chid, chan ? chan->object.client->name : "unknown",
193 nv04_fifo_dma_pusher(struct nv04_fifo *fifo, u32 chid)
205 chan = nvkm_fifo_chan_chid(&fifo->base, chid, &flags);
216 chid, name, ho_get, dma_get, ho_put, dma_put,
231 chid, name, dma_get, dma_put, state
252 u32 reassign, chid, get, sem; local in function:nv04_fifo_intr
[all...] |
| nouveau_nvkm_engine_fifo_gf100.c | 71 nvkm_wo32(cur, (nr * 8) + 0, chan->base.chid);
210 u32 chid = chan->base.chid; local in function:gf100_fifo_recover
213 nvkm_subdev_name[engine->subdev.index], chid);
216 nvkm_mask(device, 0x003004 + (chid * 0x08), 0x00000001, 0x00000000);
223 nvkm_fifo_kevent(&fifo->base, chid);
331 info->reason, er ? er->name : "", chan ? chan->chid : -1,
361 u32 chid = (stat & 0x0000007f); local in function:gf100_fifo_intr_sched_ctxsw
366 if (chan->base.chid == chid) {
441 u32 chid = nvkm_rd32(device, 0x040120 + (unit * 0x2000)) & 0x7f; local in function:gf100_fifo_intr_pbdma
[all...] |
| nouveau_nvkm_engine_fifo_gk104.c | 246 nvkm_wo32(memory, offset + 0, chan->base.chid);
335 gk104_fifo_recover_chid(struct gk104_fifo *fifo, int runl, int chid)
341 if (chan->base.chid == chid) {
348 if (cgrp->id == chid) {
361 gk104_fifo_recover_chan(struct nvkm_fifo *base, int chid)
366 const u32 stat = nvkm_rd32(device, 0x800004 + (chid * 0x08));
377 chan = gk104_fifo_recover_chid(fifo, runl, chid);
380 nvkm_fifo_kevent(&fifo->base, chid);
384 nvkm_wr32(device, 0x800004 + (chid * 0x08), stat | 0x00000800)
697 u32 chid = nvkm_rd32(device, 0x040120 + (unit * 0x2000)) & 0xfff; local in function:gk104_fifo_intr_pbdma_0
744 u32 chid = nvkm_rd32(device, 0x040120 + (unit * 0x2000)) & 0xfff; local in function:gk104_fifo_intr_pbdma_1
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/nouveau/include/nvkm/engine/ |
| fifo.h | 26 u16 chid; member in struct:nvkm_fifo_chan
67 nvkm_fifo_chan_chid(struct nvkm_fifo *, int chid, unsigned long *flags);
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/ |
| nouveau_chan.h | 15 int chid; member in struct:nouveau_channel
|
