1 /* $NetBSD: cia_pci.c,v 1.36 2021/09/11 21:30:46 andvar Exp $ */ 2 3 /* 4 * Copyright (c) 1995, 1996 Carnegie-Mellon University. 5 * All rights reserved. 6 * 7 * Author: Chris G. Demetriou 8 * 9 * Permission to use, copy, modify and distribute this software and 10 * its documentation is hereby granted, provided that both the copyright 11 * notice and this permission notice appear in all copies of the 12 * software, derivative works or modified versions, and any portions 13 * thereof, and that both notices appear in supporting documentation. 14 * 15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 18 * 19 * Carnegie Mellon requests users of this software to return to 20 * 21 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 22 * School of Computer Science 23 * Carnegie Mellon University 24 * Pittsburgh PA 15213-3890 25 * 26 * any improvements or extensions that they make and grant Carnegie the 27 * rights to redistribute these changes. 28 */ 29 30 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 31 32 __KERNEL_RCSID(0, "$NetBSD: cia_pci.c,v 1.36 2021/09/11 21:30:46 andvar Exp $"); 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/kernel.h> 37 #include <sys/device.h> 38 39 #include <dev/pci/pcireg.h> 40 #include <dev/pci/pcivar.h> 41 #include <alpha/pci/ciareg.h> 42 #include <alpha/pci/ciavar.h> 43 44 static pcireg_t cia_conf_read(void *, pcitag_t, int); 45 static void cia_conf_write(void *, pcitag_t, int, pcireg_t); 46 47 void 48 cia_pci_init(pci_chipset_tag_t pc, void *v) 49 { 50 51 pc->pc_conf_v = v; 52 pc->pc_conf_read = cia_conf_read; 53 pc->pc_conf_write = cia_conf_write; 54 } 55 56 static pcireg_t 57 cia_conf_read(void *cpv, pcitag_t tag, int offset) 58 { 59 struct cia_config *ccp = cpv; 60 pcireg_t *datap, data; 61 int s, secondary, ba; 62 uint32_t old_cfg, errbits; 63 64 if ((unsigned int)offset >= PCI_CONF_SIZE) 65 return (pcireg_t) -1; 66 67 #ifdef __GNUC__ 68 s = 0; /* XXX gcc -Wuninitialized */ 69 old_cfg = 0; /* XXX gcc -Wuninitialized */ 70 #endif 71 72 /* 73 * Some (apparently-common) revisions of EB164 and AlphaStation 74 * firmware do the Wrong thing with PCI master and target aborts, 75 * which are caused by accessing the configuration space of devices 76 * that don't exist (for example). 77 * 78 * To work around this, we clear the CIA error register's PCI 79 * master and target abort bits before touching PCI configuration 80 * space and check it afterwards. If it indicates a master or target 81 * abort, the device wasn't there so we return 0xffffffff. 82 */ 83 REGVAL(CIA_CSR_CIA_ERR) = CIA_ERR_RCVD_MAS_ABT|CIA_ERR_RCVD_TAR_ABT; 84 alpha_mb(); 85 alpha_pal_draina(); 86 87 /* secondary if bus # != 0 */ 88 pci_decompose_tag(&ccp->cc_pc, tag, &secondary, 0, 0); 89 if (secondary) { 90 s = splhigh(); 91 old_cfg = REGVAL(CIA_CSR_CFG); 92 alpha_mb(); 93 REGVAL(CIA_CSR_CFG) = old_cfg | 0x1; 94 alpha_mb(); 95 } 96 97 /* 98 * We just inline the BWX support, since this is the only 99 * difference between BWX and swiz for config space. 100 */ 101 if (ccp->cc_flags & CCF_PCI_USE_BWX) { 102 if (secondary) { 103 datap = 104 (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_EV56_BWCONF1 | 105 tag | (offset & ~0x03)); 106 } else { 107 datap = 108 (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_EV56_BWCONF0 | 109 tag | (offset & ~0x03)); 110 } 111 } else { 112 datap = (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_PCI_CONF | 113 tag << 5UL | /* XXX */ 114 (offset & ~0x03) << 5 | /* XXX */ 115 0 << 5 | /* XXX */ 116 0x3 << 3); /* XXX */ 117 } 118 data = (pcireg_t)-1; 119 alpha_mb(); 120 if (!(ba = badaddr(datap, sizeof *datap))) 121 data = *datap; 122 alpha_mb(); 123 alpha_mb(); 124 125 if (secondary) { 126 alpha_mb(); 127 REGVAL(CIA_CSR_CFG) = old_cfg; 128 alpha_mb(); 129 splx(s); 130 } 131 132 alpha_pal_draina(); 133 alpha_mb(); 134 errbits = REGVAL(CIA_CSR_CIA_ERR); 135 if (errbits & (CIA_ERR_RCVD_MAS_ABT|CIA_ERR_RCVD_TAR_ABT)) { 136 ba = 1; 137 data = 0xffffffff; 138 } 139 140 if (errbits) { 141 REGVAL(CIA_CSR_CIA_ERR) = errbits; 142 alpha_mb(); 143 alpha_pal_draina(); 144 } 145 146 #if 0 147 printf("cia_conf_read: tag 0x%lx, reg 0x%lx -> %x @ %p%s\n", tag, reg, 148 data, datap, ba ? " (badaddr)" : ""); 149 #endif 150 151 return data; 152 } 153 154 static void 155 cia_conf_write(void *cpv, pcitag_t tag, int offset, pcireg_t data) 156 { 157 struct cia_config *ccp = cpv; 158 pcireg_t *datap; 159 int s, secondary; 160 uint32_t old_cfg; 161 162 if ((unsigned int)offset >= PCI_CONF_SIZE) 163 return; 164 165 #ifdef __GNUC__ 166 s = 0; /* XXX gcc -Wuninitialized */ 167 old_cfg = 0; /* XXX gcc -Wuninitialized */ 168 #endif 169 170 /* secondary if bus # != 0 */ 171 pci_decompose_tag(&ccp->cc_pc, tag, &secondary, 0, 0); 172 if (secondary) { 173 s = splhigh(); 174 old_cfg = REGVAL(CIA_CSR_CFG); 175 alpha_mb(); 176 REGVAL(CIA_CSR_CFG) = old_cfg | 0x1; 177 alpha_mb(); 178 } 179 180 /* 181 * We just inline the BWX support, since this is the only 182 * difference between BWX and swiz for config space. 183 */ 184 if (ccp->cc_flags & CCF_PCI_USE_BWX) { 185 if (secondary) { 186 datap = 187 (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_EV56_BWCONF1 | 188 tag | (offset & ~0x03)); 189 } else { 190 datap = 191 (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_EV56_BWCONF0 | 192 tag | (offset & ~0x03)); 193 } 194 } else { 195 datap = (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_PCI_CONF | 196 tag << 5UL | /* XXX */ 197 (offset & ~0x03) << 5 | /* XXX */ 198 0 << 5 | /* XXX */ 199 0x3 << 3); /* XXX */ 200 } 201 alpha_mb(); 202 *datap = data; 203 alpha_mb(); 204 alpha_mb(); 205 206 if (secondary) { 207 alpha_mb(); 208 REGVAL(CIA_CSR_CFG) = old_cfg; 209 alpha_mb(); 210 splx(s); 211 } 212 213 #if 0 214 printf("cia_conf_write: tag 0x%lx, reg 0x%lx -> 0x%x @ %p\n", tag, 215 reg, data, datap); 216 #endif 217 } 218
Indexes created Tue Sep 23 14:10:03 GMT 2025