/src/sys/arch/aarch64/aarch64/ |
cpufunc.c | 105 uint32_t clidr, ctr; local in function:aarch64_getcacheinfo 128 * CLIDR - Cache Level ID Register 134 for (level = 0, clidr = reg_clidr_el1_read(); 135 level < MAX_CACHE_LEVEL; level++, clidr >>= 3) { 139 switch (clidr & 7) { 435 const uint64_t clidr = reg_clidr_el1_read(); local in function:aarch64_setcpufuncs 451 __SHIFTOUT(clidr, CLIDR_LOC) == 0 || 452 (__SHIFTOUT(clidr, CLIDR_LOUIS) == 0 && __SHIFTOUT(clidr, CLIDR_LOUU) == 0)) {
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cpu.c | 341 const uint64_t clidr = id->ac_clidr; local in function:cpu_identify1 353 __SHIFTOUT(clidr, CLIDR_LOUU), 354 __SHIFTOUT(clidr, CLIDR_LOC), 355 __SHIFTOUT(clidr, CLIDR_LOUIS));
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trap.c | 332 uint64_t clidr = ci->ci_id.ac_clidr; local in function:configure_cpu_traps 334 if (__SHIFTOUT(clidr, CLIDR_LOC) == 0 || 335 (__SHIFTOUT(clidr, CLIDR_LOUIS) == 0 && 336 __SHIFTOUT(clidr, CLIDR_LOUU) == 0)) {
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/src/sys/arch/arm/arm/ |
cpufunc.c | 1343 get_cacheinfo_clidr(struct arm_cache_info *info, u_int level, u_int clidr) 1347 if (clidr & 6) { 1364 info->cache_unified = (clidr == 4); 1412 u_int clidr = armreg_clidr_read(); local in function:get_cachetype_cp15 1430 get_cacheinfo_clidr(&arm_pcache, 0, clidr & 7); 1432 clidr >>= 3; 1433 if (clidr & 7) { 1434 get_cacheinfo_clidr(&arm_scache, 1, clidr & 7);
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