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    Searched defs:ctr (Results 1 - 25 of 27) sorted by relevancy

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  /src/sys/arch/mips/alchemy/
au_timer.c 75 uint32_t ctl, ctr, octr; local in function:au_cal_timers
95 ctr = bus_space_read_4(st, sh, PC_COUNTER_READ_1);
98 } while (ctr == octr);
102 ctr = bus_space_read_4(st, sh, PC_COUNTER_READ_1);
103 } while (ctr == octr); // while (ctr <= octr + 1);
  /src/sys/arch/powerpc/include/
reg.h 56 __register_t ctr; /* Count Register */ member in struct:reg
db_machdep.h 54 u_int32_t ctr; member in struct:powerpc_saved_state
144 * 7 4-byte UISA special-purpose registers: pc, ps, cr, lr, ctr, xer, fpscr
frame.h 76 __register_t ctr; member in struct:utrapframe
168 __register32_t ctr; member in struct:utrapframe32
  /src/sys/external/bsd/drm2/dist/drm/nouveau/include/nvif/
if0003.h 16 } ctr[4]; member in struct:nvif_perfdom_v0
32 __u32 ctr[4]; member in struct:nvif_perfdom_read_v0
  /src/sys/arch/powerpc/powerpc/
fixup.c 116 register_t ctr = 0; local in function:powerpc_fixup_stubs
145 ctr = fixreg[rs];
204 if (ctr == 0) {
209 fixup.jfi_real = fixup_addr2offset(ctr);
  /src/sys/arch/sandpoint/stand/altboot/
exception.c 42 uint32_t cr, xer, lr, ctr; member in struct:cpu_state
89 " CR=%08x XER=%08x LR=%08x CTR=%08x\n"
93 st->cr, st->xer, st->lr, st->ctr,
  /src/sys/arch/sparc/sparc/
timer_msiiep.c 211 struct counter *ctr = (struct counter *)tc->tc_priv; local in function:timer_get_timecount
222 res += ctr->limit;
224 res += ctr->offset;
  /src/sys/crypto/aes/arch/arm/
aes_neon_subr.c 298 uint32x4_t ctr; local in function:aes_neon_ccm_enc1
305 ctr = vreinterpretq_u32_u8(vrev32q_u8(ctr_be));
309 ctr = vaddq_u32(ctr, ctr32_inc);
310 ctr_be = vrev32q_u8(vreinterpretq_u8_u32(ctr));
330 uint32x4_t ctr; local in function:aes_neon_ccm_dec1
336 ctr = vreinterpretq_u32_u8(vrev32q_u8(ctr_be));
337 ctr = vaddq_u32(ctr, ctr32_inc);
338 ctr_be = vrev32q_u8(vreinterpretq_u8_u32(ctr));
    [all...]
  /src/sys/crypto/aes/arch/x86/
aes_sse2_subr.c 561 __m128i ctr; local in function:aes_sse2_ccm_enc1
587 ctr = _mm_set_epi32(bswap32(++c3), c2, c1, c0);
588 q[1] = aes_sse2_interleave_in(ctr);
595 /* Encrypt with CTR output. */
618 __m128i ctr, block; local in function:aes_sse2_ccm_dec1
634 ctr = _mm_set_epi32(bswap32(++c3), c2, c1, c0);
635 q[0] = aes_sse2_interleave_in(ctr);
643 /* Encrypt first CTR. */
666 ctr = _mm_set_epi32(bswap32(++c3), c2, c1, c0);
667 q[0] = aes_sse2_interleave_in(ctr);
    [all...]
aes_ssse3_subr.c 234 __m128i auth, ctr_be, ctr, ptxt; local in function:aes_ssse3_ccm_enc1
241 ctr = _mm_shuffle_epi8(ctr_be, bs32);
245 ctr = _mm_add_epi32(ctr, ctr32_inc);
246 ctr_be = _mm_shuffle_epi8(ctr, bs32);
261 __m128i auth, ctr_be, ctr, ptxt; local in function:aes_ssse3_ccm_dec1
268 ctr = _mm_shuffle_epi8(ctr_be, bs32);
270 ctr = _mm_add_epi32(ctr, ctr32_inc);
271 ctr_be = _mm_shuffle_epi8(ctr, bs32)
    [all...]
  /src/sys/dev/ppbus/
lpt.c 345 u_char dtr, ctr, str, var; local in function:lpt_detect
349 ctr = ppbus_rctr(dev);
384 ppbus_wctr(dev, ctr);
  /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/pm/
priv.h 23 u32 ctr; member in struct:nvkm_perfctr
81 struct nvkm_perfctr *ctr[4]; member in struct:nvkm_perfdom
nouveau_nvkm_engine_pm_base.c 134 nvkm_perfsrc_enable(struct nvkm_pm *pm, struct nvkm_perfctr *ctr)
145 for (j = 0; j < 8 && ctr->source[i][j]; j++) {
146 sig = nvkm_perfsig_find(pm, ctr->domain,
147 ctr->signal[i], &dom);
151 src = nvkm_perfsrc_find(pm, sig, ctr->source[i][j]);
160 value |= ((ctr->source[i][j] >> 32) << src->shift);
173 nvkm_perfsrc_disable(struct nvkm_pm *pm, struct nvkm_perfctr *ctr)
184 for (j = 0; j < 8 && ctr->source[i][j]; j++) {
185 sig = nvkm_perfsig_find(pm, ctr->domain,
186 ctr->signal[i], &dom)
322 struct nvkm_perfctr *ctr = dom->ctr[i]; local in function:nvkm_perfdom_dtor
339 struct nvkm_perfctr *ctr; local in function:nvkm_perfctr_new
381 struct nvkm_perfctr *ctr[4] = {}; local in function:nvkm_perfdom_new_
    [all...]
  /src/sys/dev/tprof/
tprof_armv7.c 239 uint64_t ctr = armv7_pmu_getset_pmevcntr(bit, local in function:armv7_pmu_intr
242 sc->sc_count[bit].ctr_counter_val + ctr;
tprof_armv8.c 211 uint64_t ctr = armv8_pmu_getset_pmevcntr(bit, local in function:armv8_pmu_intr
214 sc->sc_count[bit].ctr_counter_val + ctr;
tprof_x86_amd.c 200 uint64_t ctr = tprof_amd_counter_read(bit); local in function:tprof_amd_nmi
201 if ((ctr & __BIT(COUNTER_BITWIDTH - 1)) != 0)
209 sc->sc_count[bit].ctr_counter_val + ctr;
tprof_x86_intel.c 193 uint64_t ctr = tprof_intel_counter_read(bit); local in function:tprof_intel_nmi
194 if ((ctr & __BIT(counter_bitwidth - 1)) != 0)
202 sc->sc_count[bit].ctr_counter_val + ctr;
  /src/sys/crypto/aes/
aes_ccm.c 69 uint8_t *ctr = C->authctr + 16; local in function:aes_ccm_inc
72 if (++ctr[15] == 0 && ++ctr[14] == 0)
79 uint8_t *ctr = C->authctr + 16; local in function:aes_ccm_zero_ctr
82 ctr[14] = ctr[15] = 0;
93 uint8_t *ctr = C->authctr + 16; local in function:aes_ccm_init
174 /* Set up the AES input for AES-CTR encryption. */
175 ctr[0] = __SHIFTIN(L - 1, CCM_EFLAGS_L);
176 memcpy(ctr + 1, nonce, noncelen)
187 uint8_t *ctr = C->authctr + 16; local in function:aes_ccm_enc
247 uint8_t *ctr = C->authctr + 16; local in function:aes_ccm_dec
310 const uint8_t *ctr = C->authctr + 16; local in function:aes_ccm_tag
    [all...]
  /src/sys/arch/aarch64/aarch64/
cpufunc.c 105 uint32_t clidr, ctr; local in function:aarch64_getcacheinfo
109 * CTR - Cache Type Register
111 ctr = reg_ctr_el0_read();
112 switch (__SHIFTOUT(ctr, CTR_EL0_L1IP_MASK)) {
185 const uint32_t ctr = id->ac_ctr; local in function:aarch64_parsecacheinfo
189 if (arm_dcache_maxline < __SHIFTOUT(ctr, CTR_EL0_DMIN_LINE)) {
190 arm_dcache_maxline = __SHIFTOUT(ctr, CTR_EL0_DMIN_LINE);
434 const uint64_t ctr = reg_ctr_el0_read(); local in function:aarch64_setcpufuncs
446 if (__SHIFTOUT(ctr, CTR_EL0_DIC) == 1) {
450 } else if (__SHIFTOUT(ctr, CTR_EL0_IDC) == 1 |
    [all...]
cpu.c 338 * CTR - Cache Type Register
340 const uint64_t ctr = id->ac_ctr; local in function:cpu_identify1
344 __SHIFTOUT(ctr, CTR_EL0_CWG_LINE) * 4,
345 __SHIFTOUT(ctr, CTR_EL0_ERG_LINE) * 4);
349 sizeof(int) << __SHIFTOUT(ctr, CTR_EL0_DMIN_LINE),
350 sizeof(int) << __SHIFTOUT(ctr, CTR_EL0_IMIN_LINE),
351 __SHIFTOUT(ctr, CTR_EL0_DIC),
352 __SHIFTOUT(ctr, CTR_EL0_IDC),
  /src/sys/arch/sgimips/hpc/
pi1ppc.c 1169 uint8_t ctr; local in function:pi1ppc_nibble_read
1179 ctr = pi1ppc_r_ctr(pi1ppc);
1181 if (!(ctr & IRQENABLE)) {
1182 ctr |= IRQENABLE;
1183 pi1ppc_w_ctr(pi1ppc, ctr);
1200 ctr = pi1ppc_r_ctr(pi1ppc);
1202 ctr |= HOSTBUSY;
1203 pi1ppc_w_ctr(pi1ppc, ctr);
1217 ctr &= ~HOSTBUSY;
1218 pi1ppc_w_ctr(pi1ppc, ctr);
1242 uint8_t ctr; local in function:pi1ppc_byte_read
1364 unsigned char ctr; local in function:pi1ppc_std_write
    [all...]
  /src/sys/dev/ic/
atppc.c 1616 u_int8_t ctr; local in function:atppc_nibble_read
1621 ctr = atppc_r_ctr(atppc);
1623 if (!(ctr & IRQENABLE)) {
1624 ctr |= IRQENABLE;
1625 atppc_w_ctr(atppc, ctr);
1641 ctr = atppc_r_ctr(atppc);
1643 ctr |= HOSTBUSY;
1644 atppc_w_ctr(atppc, ctr);
1658 ctr &= ~HOSTBUSY;
1659 atppc_w_ctr(atppc, ctr);
1683 u_int8_t ctr; local in function:atppc_byte_read
1794 u_int8_t ctr; local in function:atppc_ecp_read
1960 unsigned char ctr; local in function:atppc_std_write
2054 unsigned char ctr; local in function:atppc_fifo_write
2282 unsigned char ctr = atppc_r_ctr(atppc); local in function:atppc_fifo_write_error
    [all...]
  /src/sys/arch/amiga/dev/
if_esreg.h 48 volatile u_short ctr; /* Control Register */ member in struct:smcregs::__anonf052b2be0208
  /src/sys/dev/pci/
cs4280.c 1129 uint32_t ctr; local in function:cs4280_download
1138 for (ctr = 0; ctr < len; ctr++) {
1143 BA1WRITE4(sc, offset+ctr*4, htole32(*(src+ctr)));
1145 data = htole32(*(src+ctr));
1146 c0 = bus_space_read_1(sc->ba1t, sc->ba1h, offset+ctr*4+0);
1147 c1 = bus_space_read_1(sc->ba1t, sc->ba1h, offset+ctr*4+1);
1148 c2 = bus_space_read_1(sc->ba1t, sc->ba1h, offset+ctr*4+2)
1498 uint32_t ctr, data; local in function:cs4280_checkimage
    [all...]

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