1 /* $NetBSD: amdgpu_command_table_helper2_dce112.c,v 1.2 2021/12/18 23:45:01 riastradh Exp $ */ 2 3 /* 4 * Copyright 2012-15 Advanced Micro Devices, Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: AMD 25 * 26 */ 27 28 #include <sys/cdefs.h> 29 __KERNEL_RCSID(0, "$NetBSD: amdgpu_command_table_helper2_dce112.c,v 1.2 2021/12/18 23:45:01 riastradh Exp $"); 30 31 #include "dm_services.h" 32 33 #include "atom.h" 34 35 #include "include/bios_parser_types.h" 36 37 #include "../command_table_helper2.h" 38 39 static uint8_t phy_id_to_atom(enum transmitter t) 40 { 41 uint8_t atom_phy_id; 42 43 switch (t) { 44 case TRANSMITTER_UNIPHY_A: 45 atom_phy_id = ATOM_PHY_ID_UNIPHYA; 46 break; 47 case TRANSMITTER_UNIPHY_B: 48 atom_phy_id = ATOM_PHY_ID_UNIPHYB; 49 break; 50 case TRANSMITTER_UNIPHY_C: 51 atom_phy_id = ATOM_PHY_ID_UNIPHYC; 52 break; 53 case TRANSMITTER_UNIPHY_D: 54 atom_phy_id = ATOM_PHY_ID_UNIPHYD; 55 break; 56 case TRANSMITTER_UNIPHY_E: 57 atom_phy_id = ATOM_PHY_ID_UNIPHYE; 58 break; 59 case TRANSMITTER_UNIPHY_F: 60 atom_phy_id = ATOM_PHY_ID_UNIPHYF; 61 break; 62 case TRANSMITTER_UNIPHY_G: 63 atom_phy_id = ATOM_PHY_ID_UNIPHYG; 64 break; 65 default: 66 atom_phy_id = ATOM_PHY_ID_UNIPHYA; 67 break; 68 } 69 return atom_phy_id; 70 } 71 72 static uint8_t signal_type_to_atom_dig_mode(enum signal_type s) 73 { 74 uint8_t atom_dig_mode = ATOM_TRANSMITTER_DIGMODE_V6_DP; 75 76 switch (s) { 77 case SIGNAL_TYPE_DISPLAY_PORT: 78 case SIGNAL_TYPE_EDP: 79 atom_dig_mode = ATOM_TRANSMITTER_DIGMODE_V6_DP; 80 break; 81 case SIGNAL_TYPE_DVI_SINGLE_LINK: 82 case SIGNAL_TYPE_DVI_DUAL_LINK: 83 atom_dig_mode = ATOM_TRANSMITTER_DIGMODE_V6_DVI; 84 break; 85 case SIGNAL_TYPE_HDMI_TYPE_A: 86 atom_dig_mode = ATOM_TRANSMITTER_DIGMODE_V6_HDMI; 87 break; 88 case SIGNAL_TYPE_DISPLAY_PORT_MST: 89 atom_dig_mode = ATOM_TRANSMITTER_DIGMODE_V6_DP_MST; 90 break; 91 default: 92 atom_dig_mode = ATOM_TRANSMITTER_DIGMODE_V6_DVI; 93 break; 94 } 95 96 return atom_dig_mode; 97 } 98 99 static uint8_t clock_source_id_to_atom_phy_clk_src_id( 100 enum clock_source_id id) 101 { 102 uint8_t atom_phy_clk_src_id = 0; 103 104 switch (id) { 105 case CLOCK_SOURCE_ID_PLL0: 106 atom_phy_clk_src_id = ATOM_TRANSMITTER_CONFIG_V5_P0PLL; 107 break; 108 case CLOCK_SOURCE_ID_PLL1: 109 atom_phy_clk_src_id = ATOM_TRANSMITTER_CONFIG_V5_P1PLL; 110 break; 111 case CLOCK_SOURCE_ID_PLL2: 112 atom_phy_clk_src_id = ATOM_TRANSMITTER_CONFIG_V5_P2PLL; 113 break; 114 case CLOCK_SOURCE_ID_EXTERNAL: 115 atom_phy_clk_src_id = ATOM_TRANSMITTER_CONFIG_V5_REFCLK_SRC_EXT; 116 break; 117 default: 118 atom_phy_clk_src_id = ATOM_TRANSMITTER_CONFIG_V5_P1PLL; 119 break; 120 } 121 122 return atom_phy_clk_src_id >> 2; 123 } 124 125 static uint8_t hpd_sel_to_atom(enum hpd_source_id id) 126 { 127 uint8_t atom_hpd_sel = 0; 128 129 switch (id) { 130 case HPD_SOURCEID1: 131 atom_hpd_sel = ATOM_TRANSMITTER_V6_HPD1_SEL; 132 break; 133 case HPD_SOURCEID2: 134 atom_hpd_sel = ATOM_TRANSMITTER_V6_HPD2_SEL; 135 break; 136 case HPD_SOURCEID3: 137 atom_hpd_sel = ATOM_TRANSMITTER_V6_HPD3_SEL; 138 break; 139 case HPD_SOURCEID4: 140 atom_hpd_sel = ATOM_TRANSMITTER_V6_HPD4_SEL; 141 break; 142 case HPD_SOURCEID5: 143 atom_hpd_sel = ATOM_TRANSMITTER_V6_HPD5_SEL; 144 break; 145 case HPD_SOURCEID6: 146 atom_hpd_sel = ATOM_TRANSMITTER_V6_HPD6_SEL; 147 break; 148 case HPD_SOURCEID_UNKNOWN: 149 default: 150 atom_hpd_sel = 0; 151 break; 152 } 153 return atom_hpd_sel; 154 } 155 156 static uint8_t dig_encoder_sel_to_atom(enum engine_id id) 157 { 158 /* On any ASIC after DCE80, we manually program the DIG_FE 159 * selection (see connect_dig_be_to_fe function of the link 160 * encoder), so translation should always return 0 (no FE). 161 */ 162 163 return 0; 164 } 165 166 static bool clock_source_id_to_atom( 167 enum clock_source_id id, 168 uint32_t *atom_pll_id) 169 { 170 bool result = true; 171 172 if (atom_pll_id != NULL) 173 switch (id) { 174 case CLOCK_SOURCE_COMBO_PHY_PLL0: 175 *atom_pll_id = ATOM_COMBOPHY_PLL0; 176 break; 177 case CLOCK_SOURCE_COMBO_PHY_PLL1: 178 *atom_pll_id = ATOM_COMBOPHY_PLL1; 179 break; 180 case CLOCK_SOURCE_COMBO_PHY_PLL2: 181 *atom_pll_id = ATOM_COMBOPHY_PLL2; 182 break; 183 case CLOCK_SOURCE_COMBO_PHY_PLL3: 184 *atom_pll_id = ATOM_COMBOPHY_PLL3; 185 break; 186 case CLOCK_SOURCE_COMBO_PHY_PLL4: 187 *atom_pll_id = ATOM_COMBOPHY_PLL4; 188 break; 189 case CLOCK_SOURCE_COMBO_PHY_PLL5: 190 *atom_pll_id = ATOM_COMBOPHY_PLL5; 191 break; 192 case CLOCK_SOURCE_COMBO_DISPLAY_PLL0: 193 *atom_pll_id = ATOM_PPLL0; 194 break; 195 case CLOCK_SOURCE_ID_DFS: 196 *atom_pll_id = ATOM_GCK_DFS; 197 break; 198 case CLOCK_SOURCE_ID_VCE: 199 *atom_pll_id = ATOM_DP_DTO; 200 break; 201 case CLOCK_SOURCE_ID_DP_DTO: 202 *atom_pll_id = ATOM_DP_DTO; 203 break; 204 case CLOCK_SOURCE_ID_UNDEFINED: 205 /* Should not happen */ 206 *atom_pll_id = ATOM_PPLL_INVALID; 207 result = false; 208 break; 209 default: 210 result = false; 211 break; 212 } 213 214 return result; 215 } 216 217 static bool engine_bp_to_atom(enum engine_id id, uint32_t *atom_engine_id) 218 { 219 bool result = false; 220 221 if (atom_engine_id != NULL) 222 switch (id) { 223 case ENGINE_ID_DIGA: 224 *atom_engine_id = ASIC_INT_DIG1_ENCODER_ID; 225 result = true; 226 break; 227 case ENGINE_ID_DIGB: 228 *atom_engine_id = ASIC_INT_DIG2_ENCODER_ID; 229 result = true; 230 break; 231 case ENGINE_ID_DIGC: 232 *atom_engine_id = ASIC_INT_DIG3_ENCODER_ID; 233 result = true; 234 break; 235 case ENGINE_ID_DIGD: 236 *atom_engine_id = ASIC_INT_DIG4_ENCODER_ID; 237 result = true; 238 break; 239 case ENGINE_ID_DIGE: 240 *atom_engine_id = ASIC_INT_DIG5_ENCODER_ID; 241 result = true; 242 break; 243 case ENGINE_ID_DIGF: 244 *atom_engine_id = ASIC_INT_DIG6_ENCODER_ID; 245 result = true; 246 break; 247 case ENGINE_ID_DIGG: 248 *atom_engine_id = ASIC_INT_DIG7_ENCODER_ID; 249 result = true; 250 break; 251 case ENGINE_ID_DACA: 252 *atom_engine_id = ASIC_INT_DAC1_ENCODER_ID; 253 result = true; 254 break; 255 default: 256 break; 257 } 258 259 return result; 260 } 261 262 static uint8_t encoder_action_to_atom(enum bp_encoder_control_action action) 263 { 264 uint8_t atom_action = 0; 265 266 switch (action) { 267 case ENCODER_CONTROL_ENABLE: 268 atom_action = ATOM_ENABLE; 269 break; 270 case ENCODER_CONTROL_DISABLE: 271 atom_action = ATOM_DISABLE; 272 break; 273 case ENCODER_CONTROL_SETUP: 274 atom_action = ATOM_ENCODER_CMD_STREAM_SETUP; 275 break; 276 case ENCODER_CONTROL_INIT: 277 atom_action = ATOM_ENCODER_INIT; 278 break; 279 default: 280 BREAK_TO_DEBUGGER(); /* Unhandle action in driver.!! */ 281 break; 282 } 283 284 return atom_action; 285 } 286 287 static uint8_t disp_power_gating_action_to_atom( 288 enum bp_pipe_control_action action) 289 { 290 uint8_t atom_pipe_action = 0; 291 292 switch (action) { 293 case ASIC_PIPE_DISABLE: 294 atom_pipe_action = ATOM_DISABLE; 295 break; 296 case ASIC_PIPE_ENABLE: 297 atom_pipe_action = ATOM_ENABLE; 298 break; 299 case ASIC_PIPE_INIT: 300 atom_pipe_action = ATOM_INIT; 301 break; 302 default: 303 ASSERT_CRITICAL(false); /* Unhandle action in driver! */ 304 break; 305 } 306 307 return atom_pipe_action; 308 } 309 310 static bool dc_clock_type_to_atom( 311 enum bp_dce_clock_type id, 312 uint32_t *atom_clock_type) 313 { 314 bool retCode = true; 315 316 if (atom_clock_type != NULL) { 317 switch (id) { 318 case DCECLOCK_TYPE_DISPLAY_CLOCK: 319 *atom_clock_type = DCE_CLOCK_TYPE_DISPCLK; 320 break; 321 322 case DCECLOCK_TYPE_DPREFCLK: 323 *atom_clock_type = DCE_CLOCK_TYPE_DPREFCLK; 324 break; 325 326 default: 327 ASSERT_CRITICAL(false); /* Unhandle action in driver! */ 328 break; 329 } 330 } 331 332 return retCode; 333 } 334 335 static uint8_t transmitter_color_depth_to_atom(enum transmitter_color_depth id) 336 { 337 uint8_t atomColorDepth = 0; 338 339 switch (id) { 340 case TRANSMITTER_COLOR_DEPTH_24: 341 atomColorDepth = PIXEL_CLOCK_V7_DEEPCOLOR_RATIO_DIS; 342 break; 343 case TRANSMITTER_COLOR_DEPTH_30: 344 atomColorDepth = PIXEL_CLOCK_V7_DEEPCOLOR_RATIO_5_4; 345 break; 346 case TRANSMITTER_COLOR_DEPTH_36: 347 atomColorDepth = PIXEL_CLOCK_V7_DEEPCOLOR_RATIO_3_2; 348 break; 349 case TRANSMITTER_COLOR_DEPTH_48: 350 atomColorDepth = PIXEL_CLOCK_V7_DEEPCOLOR_RATIO_2_1; 351 break; 352 default: 353 ASSERT_CRITICAL(false); /* Unhandle action in driver! */ 354 break; 355 } 356 357 return atomColorDepth; 358 } 359 360 /* function table */ 361 static const struct command_table_helper command_table_helper_funcs = { 362 .controller_id_to_atom = dal_cmd_table_helper_controller_id_to_atom2, 363 .encoder_action_to_atom = encoder_action_to_atom, 364 .engine_bp_to_atom = engine_bp_to_atom, 365 .clock_source_id_to_atom = clock_source_id_to_atom, 366 .clock_source_id_to_atom_phy_clk_src_id = 367 clock_source_id_to_atom_phy_clk_src_id, 368 .signal_type_to_atom_dig_mode = signal_type_to_atom_dig_mode, 369 .hpd_sel_to_atom = hpd_sel_to_atom, 370 .dig_encoder_sel_to_atom = dig_encoder_sel_to_atom, 371 .phy_id_to_atom = phy_id_to_atom, 372 .disp_power_gating_action_to_atom = disp_power_gating_action_to_atom, 373 .clock_source_id_to_ref_clk_src = NULL, 374 .transmitter_bp_to_atom = NULL, 375 .encoder_id_to_atom = dal_cmd_table_helper_encoder_id_to_atom2, 376 .encoder_mode_bp_to_atom = 377 dal_cmd_table_helper_encoder_mode_bp_to_atom2, 378 .dc_clock_type_to_atom = dc_clock_type_to_atom, 379 .transmitter_color_depth_to_atom = transmitter_color_depth_to_atom, 380 }; 381 382 /* 383 * dal_cmd_tbl_helper_dce110_get_table 384 * 385 * @brief 386 * Initialize command table helper functions 387 * 388 * @param 389 * const struct command_table_helper **h - [out] struct of functions 390 * 391 */ 392 const struct command_table_helper *dal_cmd_tbl_helper_dce112_get_table2(void) 393 { 394 return &command_table_helper_funcs; 395 } 396
Indexes created Tue Sep 23 07:09:52 GMT 2025