Home | History | Annotate | Line # | Download | only in include
      1 /*	$NetBSD: bus_defs.h,v 1.2 2019/09/23 16:17:55 skrll Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 1997, 1998, 2000, 2001 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
      9  * NASA Ames Research Center.
     10  *
     11  * Redistribution and use in source and binary forms, with or without
     12  * modification, are permitted provided that the following conditions
     13  * are met:
     14  * 1. Redistributions of source code must retain the above copyright
     15  *    notice, this list of conditions and the following disclaimer.
     16  * 2. Redistributions in binary form must reproduce the above copyright
     17  *    notice, this list of conditions and the following disclaimer in the
     18  *    documentation and/or other materials provided with the distribution.
     19  *
     20  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     21  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     22  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     23  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     25  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     28  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     30  * POSSIBILITY OF SUCH DAMAGE.
     31  */
     32 
     33 /*
     34  * Copyright (c) 1996 Carnegie-Mellon University.
     35  * All rights reserved.
     36  *
     37  * Author: Chris G. Demetriou
     38  *
     39  * Permission to use, copy, modify and distribute this software and
     40  * its documentation is hereby granted, provided that both the copyright
     41  * notice and this permission notice appear in all copies of the
     42  * software, derivative works or modified versions, and any portions
     43  * thereof, and that both notices appear in supporting documentation.
     44  *
     45  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
     46  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
     47  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
     48  *
     49  * Carnegie Mellon requests users of this software to return to
     50  *
     51  *  Software Distribution Coordinator  or  Software.Distribution (at) CS.CMU.EDU
     52  *  School of Computer Science
     53  *  Carnegie Mellon University
     54  *  Pittsburgh PA 15213-3890
     55  *
     56  * any improvements or extensions that they make and grant Carnegie the
     57  * rights to redistribute these changes.
     58  */
     59 
     60 #ifndef _DREAMCAST_BUS_DEFS_H_
     61 #define	_DREAMCAST_BUS_DEFS_H_
     62 
     63 #ifdef _KERNEL
     64 /*
     65  * Turn on BUS_SPACE_DEBUG if the global DEBUG option is enabled.
     66  */
     67 #if defined(DEBUG) && !defined(BUS_SPACE_DEBUG)
     68 #define	BUS_SPACE_DEBUG
     69 #endif
     70 
     71 #ifdef BUS_SPACE_DEBUG
     72 #include <sys/systm.h> /* for printf() prototype */
     73 /*
     74  * Macros for checking the aligned-ness of pointers passed to bus
     75  * space ops.  Strict alignment is required by the Alpha architecture,
     76  * and a trap will occur if unaligned access is performed.  These
     77  * may aid in the debugging of a broken device driver by displaying
     78  * useful information about the problem.
     79  */
     80 #define	__BUS_SPACE_ALIGNED_ADDRESS(p, t)				\
     81 	((((u_long)(p)) & (sizeof(t)-1)) == 0)
     82 
     83 #define	__BUS_SPACE_ADDRESS_SANITY(p, t, d)				\
     84 ({									\
     85 	if (__BUS_SPACE_ALIGNED_ADDRESS((p), t) == 0) {			\
     86 		printf("%s 0x%lx not aligned to %lu bytes %s:%d\n",	\
     87 		    d, (u_long)(p), (u_long)sizeof(t), __FILE__, __LINE__);	\
     88 	}								\
     89 	(void) 0;							\
     90 })
     91 
     92 #define BUS_SPACE_ALIGNED_POINTER(p, t) __BUS_SPACE_ALIGNED_ADDRESS(p, t)
     93 #else
     94 #define	__BUS_SPACE_ADDRESS_SANITY(p, t, d)	(void) 0
     95 #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t)
     96 #endif /* BUS_SPACE_DEBUG */
     97 #endif /* _KERNEL */
     98 
     99 /*
    100  * Addresses (in bus space).
    101  */
    102 typedef u_long bus_addr_t;
    103 typedef u_long bus_size_t;
    104 
    105 #define PRIxBUSADDR	"lx"
    106 #define PRIxBUSSIZE	"lx"
    107 #define PRIuBUSSIZE	"lu"
    108 /*
    109  * Access methods for bus space.
    110  */
    111 typedef struct dreamcast_bus_space *bus_space_tag_t;
    112 typedef u_long bus_space_handle_t;
    113 
    114 #define PRIxBSH		"lx"
    115 
    116 struct dreamcast_bus_space {
    117 	/* cookie */
    118 	void		*dbs_cookie;
    119 
    120 	/* mapping/unmapping */
    121 	int		(*dbs_map)(void *, bus_addr_t, bus_size_t,
    122 			    int, bus_space_handle_t *);
    123 	void		(*dbs_unmap)(void *, bus_space_handle_t,
    124 			    bus_size_t);
    125 	int		(*dbs_subregion)(void *, bus_space_handle_t,
    126 			    bus_size_t, bus_size_t, bus_space_handle_t *);
    127 	paddr_t		(*dbs_mmap)(void *, bus_addr_t, off_t, int, int);
    128 
    129 	/* allocation/deallocation */
    130 	int		(*dbs_alloc)(void *, bus_addr_t, bus_addr_t,
    131 			    bus_size_t, bus_size_t, bus_size_t, int,
    132 			    bus_addr_t *, bus_space_handle_t *);
    133 	void		(*dbs_free)(void *, bus_space_handle_t,
    134 			    bus_size_t);
    135 
    136 	/* get kernel virtual address */
    137 	void *		(*dbs_vaddr)(void *, bus_space_handle_t);
    138 
    139 	/* read (single) */
    140 	uint8_t		(*dbs_r_1)(void *, bus_space_handle_t,
    141 			    bus_size_t);
    142 	uint16_t	(*dbs_r_2)(void *, bus_space_handle_t,
    143 			    bus_size_t);
    144 	uint32_t	(*dbs_r_4)(void *, bus_space_handle_t,
    145 			    bus_size_t);
    146 	uint64_t	(*dbs_r_8)(void *, bus_space_handle_t,
    147 			    bus_size_t);
    148 
    149 	/* read multiple */
    150 	void		(*dbs_rm_1)(void *, bus_space_handle_t,
    151 			    bus_size_t, uint8_t *, bus_size_t);
    152 	void		(*dbs_rm_2)(void *, bus_space_handle_t,
    153 			    bus_size_t, uint16_t *, bus_size_t);
    154 	void		(*dbs_rm_4)(void *, bus_space_handle_t,
    155 			    bus_size_t, uint32_t *, bus_size_t);
    156 	void		(*dbs_rm_8)(void *, bus_space_handle_t,
    157 			    bus_size_t, uint64_t *, bus_size_t);
    158 
    159 	/* read region */
    160 	void		(*dbs_rr_1)(void *, bus_space_handle_t,
    161 			    bus_size_t, uint8_t *, bus_size_t);
    162 	void		(*dbs_rr_2)(void *, bus_space_handle_t,
    163 			    bus_size_t, uint16_t *, bus_size_t);
    164 	void		(*dbs_rr_4)(void *, bus_space_handle_t,
    165 			    bus_size_t, uint32_t *, bus_size_t);
    166 	void		(*dbs_rr_8)(void *, bus_space_handle_t,
    167 			    bus_size_t, uint64_t *, bus_size_t);
    168 
    169 	/* write (single) */
    170 	void		(*dbs_w_1)(void *, bus_space_handle_t,
    171 			    bus_size_t, uint8_t);
    172 	void		(*dbs_w_2)(void *, bus_space_handle_t,
    173 			    bus_size_t, uint16_t);
    174 	void		(*dbs_w_4)(void *, bus_space_handle_t,
    175 			    bus_size_t, uint32_t);
    176 	void		(*dbs_w_8)(void *, bus_space_handle_t,
    177 			    bus_size_t, uint64_t);
    178 
    179 	/* write multiple */
    180 	void		(*dbs_wm_1)(void *, bus_space_handle_t,
    181 			    bus_size_t, const uint8_t *, bus_size_t);
    182 	void		(*dbs_wm_2)(void *, bus_space_handle_t,
    183 			    bus_size_t, const uint16_t *, bus_size_t);
    184 	void		(*dbs_wm_4)(void *, bus_space_handle_t,
    185 			    bus_size_t, const uint32_t *, bus_size_t);
    186 	void		(*dbs_wm_8)(void *, bus_space_handle_t,
    187 			    bus_size_t, const uint64_t *, bus_size_t);
    188 
    189 	/* write region */
    190 	void		(*dbs_wr_1)(void *, bus_space_handle_t,
    191 			    bus_size_t, const uint8_t *, bus_size_t);
    192 	void		(*dbs_wr_2)(void *, bus_space_handle_t,
    193 			    bus_size_t, const uint16_t *, bus_size_t);
    194 	void		(*dbs_wr_4)(void *, bus_space_handle_t,
    195 			    bus_size_t, const uint32_t *, bus_size_t);
    196 	void		(*dbs_wr_8)(void *, bus_space_handle_t,
    197 			    bus_size_t, const uint64_t *, bus_size_t);
    198 
    199 	/* set multiple */
    200 	void		(*dbs_sm_1)(void *, bus_space_handle_t,
    201 			    bus_size_t, uint8_t, bus_size_t);
    202 	void		(*dbs_sm_2)(void *, bus_space_handle_t,
    203 			    bus_size_t, uint16_t, bus_size_t);
    204 	void		(*dbs_sm_4)(void *, bus_space_handle_t,
    205 			    bus_size_t, uint32_t, bus_size_t);
    206 	void		(*dbs_sm_8)(void *, bus_space_handle_t,
    207 			    bus_size_t, uint64_t, bus_size_t);
    208 
    209 	/* set region */
    210 	void		(*dbs_sr_1)(void *, bus_space_handle_t,
    211 			    bus_size_t, uint8_t, bus_size_t);
    212 	void		(*dbs_sr_2)(void *, bus_space_handle_t,
    213 			    bus_size_t, uint16_t, bus_size_t);
    214 	void		(*dbs_sr_4)(void *, bus_space_handle_t,
    215 			    bus_size_t, uint32_t, bus_size_t);
    216 	void		(*dbs_sr_8)(void *, bus_space_handle_t,
    217 			    bus_size_t, uint64_t, bus_size_t);
    218 
    219 	/* copy */
    220 	void		(*dbs_c_1)(void *, bus_space_handle_t, bus_size_t,
    221 			    bus_space_handle_t, bus_size_t, bus_size_t);
    222 	void		(*dbs_c_2)(void *, bus_space_handle_t, bus_size_t,
    223 			    bus_space_handle_t, bus_size_t, bus_size_t);
    224 	void		(*dbs_c_4)(void *, bus_space_handle_t, bus_size_t,
    225 			    bus_space_handle_t, bus_size_t, bus_size_t);
    226 	void		(*dbs_c_8)(void *, bus_space_handle_t, bus_size_t,
    227 			    bus_space_handle_t, bus_size_t, bus_size_t);
    228 };
    229 
    230 #define	BUS_SPACE_MAP_CACHEABLE		0x01
    231 #define	BUS_SPACE_MAP_LINEAR		0x02
    232 #define	BUS_SPACE_MAP_PREFETCHABLE     	0x04
    233 
    234 #ifdef _KERNEL
    235 
    236 #define	BUS_SPACE_BARRIER_READ	0x01
    237 #define	BUS_SPACE_BARRIER_WRITE	0x02
    238 
    239 #endif /* _KERNEL */
    240 
    241 /*
    242  * Flags used in various bus DMA methods.
    243  */
    244 #define	BUS_DMA_WAITOK		0x000	/* safe to sleep (pseudo-flag) */
    245 #define	BUS_DMA_NOWAIT		0x001	/* not safe to sleep */
    246 #define	BUS_DMA_ALLOCNOW	0x002	/* perform resource allocation now */
    247 #define	BUS_DMA_COHERENT	0x004	/* map memory to not require sync */
    248 #define	BUS_DMA_STREAMING	0x008	/* hint: sequential, unidirectional */
    249 #define	BUS_DMA_BUS1		0x010	/* placeholders for bus functions... */
    250 #define	BUS_DMA_BUS2		0x020
    251 #define	BUS_DMA_BUS3		0x040
    252 #define	BUS_DMA_BUS4		0x080
    253 #define	BUS_DMA_READ		0x100	/* mapping is device -> memory only */
    254 #define	BUS_DMA_WRITE		0x200	/* mapping is memory -> device only */
    255 #define	BUS_DMA_NOCACHE		0x400	/* hint: map non-cached memory */
    256 
    257 /* Forwards needed by prototypes below. */
    258 struct mbuf;
    259 struct uio;
    260 
    261 /*
    262  *	Operations performed by bus_dmamap_sync().
    263  */
    264 #define	BUS_DMASYNC_PREREAD	0x01
    265 #define	BUS_DMASYNC_POSTREAD	0x02
    266 #define	BUS_DMASYNC_PREWRITE	0x04
    267 #define	BUS_DMASYNC_POSTWRITE	0x08
    268 
    269 typedef struct dreamcast_bus_dma_tag		*bus_dma_tag_t;
    270 typedef struct dreamcast_bus_dmamap		*bus_dmamap_t;
    271 
    272 #define BUS_DMA_TAG_VALID(t)    ((t) != (bus_dma_tag_t)0)
    273 
    274 /*
    275  *	bus_dma_segment_t
    276  *
    277  *	Describes a single contiguous DMA transaction.  Values
    278  *	are suitable for programming into DMA registers.
    279  */
    280 struct dreamcast_bus_dma_segment {
    281 	bus_addr_t	ds_addr;	/* DMA address */
    282 	bus_size_t	ds_len;		/* length of transfer */
    283 };
    284 typedef struct dreamcast_bus_dma_segment	bus_dma_segment_t;
    285 
    286 /*
    287  *	bus_dma_tag_t
    288  *
    289  *	A machine-dependent opaque type describing the implementation of
    290  *	DMA for a given bus.
    291  */
    292 
    293 struct dreamcast_bus_dma_tag {
    294 	void	*_cookie;		/* cookie used in the guts */
    295 
    296 	/*
    297 	 * DMA mapping methods.
    298 	 */
    299 	int	(*_dmamap_create)(bus_dma_tag_t, bus_size_t, int,
    300 		    bus_size_t, bus_size_t, int, bus_dmamap_t *);
    301 	void	(*_dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t);
    302 	int	(*_dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *,
    303 		    bus_size_t, struct proc *, int);
    304 	int	(*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t,
    305 		    struct mbuf *, int);
    306 	int	(*_dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t,
    307 		    struct uio *, int);
    308 	int	(*_dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t,
    309 		    bus_dma_segment_t *, int, bus_size_t, int);
    310 	void	(*_dmamap_unload)(bus_dma_tag_t, bus_dmamap_t);
    311 	void	(*_dmamap_sync)(bus_dma_tag_t, bus_dmamap_t,
    312 		    bus_addr_t, bus_size_t, int);
    313 
    314 	/*
    315 	 * DMA memory utility functions.
    316 	 */
    317 	int	(*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t,
    318 		    bus_size_t, bus_dma_segment_t *, int, int *, int);
    319 	void	(*_dmamem_free)(bus_dma_tag_t,
    320 		    bus_dma_segment_t *, int);
    321 	int	(*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *,
    322 		    int, size_t, void **, int);
    323 	void	(*_dmamem_unmap)(bus_dma_tag_t, void *, size_t);
    324 	paddr_t	(*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *,
    325 		    int, off_t, int, int);
    326 };
    327 
    328 /*
    329  *	bus_dmamap_t
    330  *
    331  *	Describes a DMA mapping.
    332  */
    333 struct dreamcast_bus_dmamap {
    334 	/*
    335 	 * PRIVATE MEMBERS: not for use my machine-independent code.
    336 	 */
    337 	bus_size_t	_dm_size;	/* largest DMA transfer mappable */
    338 	int		_dm_segcnt;	/* number of segs this map can map */
    339 	bus_size_t	_dm_maxmaxsegsz; /* fixed largest possible segment */
    340 	bus_size_t	_dm_boundary;	/* don't cross this */
    341 	int		_dm_flags;	/* misc. flags */
    342 
    343 	void		*_dm_cookie;	/* cookie for bus-specific functions */
    344 
    345 	/*
    346 	 * PUBLIC MEMBERS: these are used by machine-independent code.
    347 	 */
    348 	int		dm_nsegs;	/* # valid segments in mapping */
    349 	bus_dma_segment_t dm_segs[1];	/* segments; variable length */
    350 	bus_size_t	dm_mapsize;	/* size of the mapping */
    351 	bus_size_t	dm_maxsegsz;	/* largest possible segment */
    352 };
    353 
    354 #endif /* _DREAMCAST_BUS_DEFS_H_ */
    355