| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/ |
| dcn10_hubp.h | 673 uint32_t dcc_en; member in struct:dcn_hubp_state
|
| amdgpu_dcn10_hubp.c | 517 uint32_t dcc_en = enable ? 1 : 0; local in function:hubp1_dcc_control
522 PRIMARY_SURFACE_DCC_EN, dcc_en,
524 SECONDARY_SURFACE_DCC_EN, dcc_en,
1013 PRIMARY_SURFACE_DCC_EN, &s->dcc_en);
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/ |
| amdgpu_dcn20_hubp.c | 409 uint32_t dcc_en = enable ? 1 : 0; local in function:hubp2_dcc_control
414 PRIMARY_SURFACE_DCC_EN, dcc_en,
416 SECONDARY_SURFACE_DCC_EN, dcc_en,
1205 PRIMARY_SURFACE_DCC_EN, &s->dcc_en);
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/ |
| amdgpu_dml1_display_rq_dlg_calc.c | 1016 bool dcc_en; local in function:dml1_rq_dlg_get_dlg_params
1187 dcc_en = e2e_pipe_param.pipe.src.dcc;
1347 if (dcc_en && vm_en)
1349 if (dcc_en)
1401 if (vm_en && dcc_en) {
1415 if (vm_en || dcc_en) {
|
