1 /* $NetBSD: dcmreg.h,v 1.11 2023/01/15 06:19:45 tsutsui Exp $ */ 2 3 /* 4 * Copyright (c) 1988 University of Utah. 5 * Copyright (c) 1982, 1986, 1990, 1993 6 * The Regents of the University of California. All rights reserved. 7 * 8 * This code is derived from software contributed to Berkeley by 9 * the Systems Programming Group of the University of Utah Computer 10 * Science Department. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. Neither the name of the University nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * from: Utah $Hdr: dcmreg.h 1.7 92/01/21$ 37 * 38 * @(#)dcmreg.h 8.1 (Berkeley) 6/10/93 39 */ 40 41 #include <hp300/dev/iotypes.h> /* XXX */ 42 43 struct dcmdevice { /* host address, only odd bytes addressed */ 44 u_char dcm_pad0; 45 vu_char dcm_rsid; /* Reset / ID 0001 */ 46 u_char dcm_pad1; 47 vu_char dcm_ic; /* Interrupt control register 0003 */ 48 u_char dcm_pad2; 49 vu_char dcm_sem; /* Semaphore register 0005 */ 50 u_char dcm_pad3[0x7ffa]; /* Unaddressable 0006-7fff */ 51 u_char dcm_pad4; 52 vu_char dcm_iir; /* Interrupt ident register 8001 */ 53 u_char dcm_pad5; 54 vu_char dcm_cr; /* Command register 8003 */ 55 u_char dcm_pad6[0x3fc]; /* Card scratch 8004-83ff */ 56 struct dcmrfifo { 57 u_char ptr_pad1; 58 vu_char data_char; 59 u_char ptr_pad2; 60 vu_char data_stat; 61 } dcm_rfifos[4][0x80]; /* Receive queues 8400 */ 62 struct { 63 u_char ptr_pad1; 64 vu_char data_data; 65 } dcm_bmap[0x100]; /* Bitmap table 8c00 */ 66 struct { 67 u_char ptr_pad; 68 vu_char ptr; 69 } dcm_rhead[4]; /* Fifo head - receive 8e00 */ 70 struct { 71 u_char ptr_pad; 72 vu_char ptr; 73 } dcm_rtail[4]; /* Fifo tail - receive 8e08 */ 74 struct { 75 u_char ptr_pad; 76 vu_char ptr; 77 } dcm_thead[4]; /* Fifo head - transmit 8e10 */ 78 struct { 79 u_char ptr_pad; 80 vu_char ptr; 81 } dcm_ttail[4]; /* Fifo tail - transmit 8e18 */ 82 struct { 83 u_char pad1; 84 vu_char dcm_conf; 85 u_char pad2; 86 vu_char dcm_baud; 87 } dcm_data[4]; /* Configuration registers 8e20 */ 88 struct modemreg { 89 u_char pad0; 90 vu_char mdmin; /* Modem in 8e31 */ 91 u_char pad1; 92 vu_char mdmout; /* Modem out 8e33 */ 93 u_char pad2; 94 vu_char mdmmsk; /* Modem mask 8e35 */ 95 } dcm_modem0; 96 struct { 97 u_char pad1; 98 vu_char dcm_data; 99 } dcm_cmdtab[4]; /* Command tables 8e36 */ 100 struct { 101 u_char pad1; 102 vu_char dcm_data; 103 } dcm_icrtab[4]; /* Interrupt data 8e3e */ 104 u_char dcm_pad10; 105 vu_char dcm_stcon; /* Self test condition 8e47 */ 106 struct modemreg dcm_modem1; /* 638 Modem port1 8e48 */ 107 struct modemreg dcm_modem2; /* 638 Modem port2 8e4e */ 108 struct modemreg dcm_modem3; /* 638 Modem port3 8e54 */ 109 u_char dcm_pad11; 110 vu_char dcm_modemchng; /* 638 Modem change mask 8e5b */ 111 u_char dcm_pad12; 112 vu_char dcm_modemintr; /* 638 Modem interrupt mask 8e5d */ 113 u_char dcm_pad13[0x82]; /* Undef Shared Ram 8e5e-8edf */ 114 struct dcmtfifo { 115 u_char ptr_pad1; 116 vu_char data_char; 117 } dcm_tfifos[4][0x10]; /* Transmit queues 8ee0 */ 118 }; 119 120 /* 121 * Overlay structure for port specific queue "registers". 122 * Starts at offset 0x8E00+(port*2). 123 */ 124 struct dcmpreg { 125 u_char pad0; /* +00 */ 126 vu_char r_head; /* +01 */ 127 u_char pad1[7]; /* +02 */ 128 vu_char r_tail; /* +09 */ 129 u_char pad2[7]; /* +0A */ 130 vu_char t_head; /* +11 */ 131 u_char pad3[7]; /* +12 */ 132 vu_char t_tail; /* +19 */ 133 }; 134 #define dcm_preg(d, p) ((struct dcmpreg *)((uintptr_t)(d)+0x8e00+(p)*2)) 135 136 /* interface reset/id */ 137 #define DCMCON 0x80 /* REMOTE/LOCAL switch, read */ 138 #define DCMID 0x5 /* hardwired card id, read */ 139 #define DCMRS 0x80 /* software reset, write */ 140 141 /* interrupt control */ 142 #define DCMIPL(x) ((((x) >> 4) & 3) + 3) /* interrupt level, read */ 143 #define IC_IR 0x40 /* interrupt request, read */ 144 #define IC_IE 0x80 /* interrupt enable, write */ 145 #define IC_ID 0x00 /* interrupt disable, write */ 146 147 148 /* Semaphore control */ 149 #define SEM_BSY 0x80 /* read */ 150 #define SEM_CLR 0xFF /* write */ 151 #define SEM_LOCK(dcm) while ((dcm)->dcm_sem & SEM_BSY) 152 #define SEM_UNLOCK(dcm) (dcm)->dcm_sem = SEM_CLR 153 154 /* command register */ 155 #define CR_PORT0 0x1 156 #define CR_PORT1 0x2 157 #define CR_PORT2 0x4 158 #define CR_PORT3 0x8 159 #define CR_MODM 0x10 /* change modem output lines */ 160 #define CR_TIMER 0x20 /* 16ms interrupt timer toggle */ 161 #define CR_SELFT 0x40 /* run self test */ 162 #define CR_MASK 0x7f 163 164 /* interrupt ident register */ 165 #define IIR_PORT0 0x1 166 #define IIR_PORT1 0x2 167 #define IIR_PORT2 0x4 168 #define IIR_PORT3 0x8 169 #define IIR_SELFT 0x10 /* self test completed */ 170 #define IIR_MODM 0x20 /* change in modem input lines */ 171 #define IIR_TIMEO 0x40 /* Time out */ 172 #define IIR_MASK 0x7f 173 174 /* self test cond reg */ 175 #define ST_OK 0xe0 176 177 /* Line configuration register */ 178 #define LC_PNO 0x00 179 #define LC_PODD 0x01 180 #define LC_PEVEN 0x02 181 #define LC_PMSK 0x03 182 183 #define LC_1STOP 0x00 184 #define LC_1HSTOP 0x04 185 #define LC_2STOP 0x08 186 #define LC_STOPMSK 0x0b 187 188 #define LC_8BITS 0x30 189 #define LC_7BITS 0x20 190 #define LC_6BITS 0x10 191 #define LC_5BITS 0x00 192 #define LC_BITMSK 0x30 193 194 /* baud reg */ 195 #define BR_0 0x00 196 #define BR_50 0x01 197 #define BR_75 0x02 198 #define BR_110 0x03 199 #define BR_134 0x04 200 #define BR_150 0x05 201 #define BR_300 0x06 202 #define BR_600 0x07 203 #define BR_900 0x08 204 #define BR_1200 0x09 205 #define BR_1800 0x0a 206 #define BR_2400 0x0b 207 #define BR_3600 0x0c 208 #define BR_4800 0x0d 209 #define BR_7200 0x0e 210 #define BR_9600 0x0f 211 #define BR_19200 0x10 212 #define BR_38400 0x11 213 214 /* modem input register */ 215 #define MI_CTS 0x08 216 #define MI_DM 0x04 217 #define MI_CD 0x02 218 #define MI_RI 0x01 219 220 /* modem output register */ 221 #define MO_SR 0x04 222 #define MO_DTR 0x02 223 #define MO_RTS 0x01 224 #define MO_ON ((MO_DTR) | (MO_RTS)) 225 #define MO_OFF 0x00 226 227 /* cmd-tab values, write */ 228 #define CT_CON 0x1 /* configuration change */ 229 #define CT_TX 0x2 /* transmit buffer not empty */ 230 #define CT_BRK 0x4 /* toggle BREAK */ 231 232 /* icr-tab values, read */ 233 #define IT_TX 0x1 /* transmit buffer empty */ 234 #define IT_SPEC 0x2 /* special character received */ 235 236 /* data errors */ 237 #define RD_OVF 0x08 238 #define RD_BD 0x10 239 #define RD_PE 0x20 240 #define RD_OE 0x40 241 #define RD_FE 0x80 242 #define RD_MASK 0xf8 243 244 /* Transmit/Receive masks */ 245 #define TX_MASK 0x0f 246 #define RX_MASK 0xff 247 248 /* 249 * DCM console caveat: only port 1 is affected by the remote switch, and 250 * thus the only supported console port on a given DCM card. 251 */ 252 #define DCMCONSPORT 1 253
Indexes created Sat Sep 20 22:09:52 GMT 2025