| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/ |
| dce_i2c_sw.h | 38 struct ddc *ddc; member in struct:dce_i2c_sw
50 struct ddc *ddc,
56 struct ddc *ddc_handle);
|
| amdgpu_dce_i2c_sw.c | 47 struct ddc *ddc,
53 dal_gpio_get_value(ddc->pin_data, &value);
55 dal_gpio_get_value(ddc->pin_clock, &value);
61 struct ddc *ddc,
68 dal_gpio_set_value(ddc->pin_data, value);
70 dal_gpio_set_value(ddc->pin_clock, value);
77 dal_ddc_close(dce_i2c_sw->ddc);
78 dce_i2c_sw->ddc = NULL
409 struct ddc *ddc = engine->ddc; local in function:dce_i2c_sw_engine_submit_channel_request
[all...] |
| dce_aux.h | 246 struct ddc *ddc; member in struct:dce_aux
304 struct ddc *ddc);
306 int dce_aux_transfer_raw(struct ddc_service *ddc,
310 bool dce_aux_transfer_with_retries(struct ddc_service *ddc,
315 (struct ddc_service *ddc,
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| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/hw/ |
| gpio.h | 35 struct hw_ddc *ddc; member in union:gpio_hw_container
|
| aux_engine.h | 88 struct ddc *ddc; member in struct:aux_engine
146 struct ddc_service *ddc,
175 struct ddc *ddc);
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| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/nvidia/ |
| tegra186-p3310.dtsi | 125 ddc: i2c@3190000 { label
|
| tegra186-p3509-0000+p3636-0001.dts | 104 ddc: i2c@3190000 { label
338 nvidia,ddc-i2c-bus = <&ddc>;
|
| tegra194-p2972-0000.dts | 547 ddc: i2c@31c0000 { label
717 nvidia,ddc-i2c-bus = <&ddc>;
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| tegra194-p3509-0000.dtsi | 591 ddc: i2c@3190000 { label
715 nvidia,ddc-i2c-bus = <&ddc>;
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/dce110/ |
| amdgpu_hw_factory_dce110.c | 125 struct hw_ddc *ddc = HW_DDC_FROM_BASE(pin); local in function:define_ddc_registers
129 ddc->regs = &ddc_data_regs[en];
130 ddc->base.regs = &ddc_data_regs[en].gpio;
133 ddc->regs = &ddc_clk_regs[en];
134 ddc->base.regs = &ddc_clk_regs[en].gpio;
141 ddc->shifts = &ddc_shift;
142 ddc->masks = &ddc_mask;
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| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/dce80/ |
| amdgpu_hw_factory_dce80.c | 125 struct hw_ddc *ddc = HW_DDC_FROM_BASE(pin); local in function:define_ddc_registers
129 ddc->regs = &ddc_data_regs[en];
130 ddc->base.regs = &ddc_data_regs[en].gpio;
133 ddc->regs = &ddc_clk_regs[en];
134 ddc->base.regs = &ddc_clk_regs[en].gpio;
141 ddc->shifts = &ddc_shift;
142 ddc->masks = &ddc_mask;
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| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/ |
| amdgpu_hw_ddc.c | 47 ddc->shifts->field_name, ddc->masks->field_name
50 ddc->base.base.ctx
52 (ddc->regs->reg)
78 struct hw_ddc *ddc = HW_DDC_FROM_BASE(ptr); local in function:set_config
85 hw_gpio = &ddc->base;
97 switch (config_data->config.ddc.type) {
145 if (config_data->config.ddc.data_en_bit_present ||
146 config_data->config.ddc.clock_en_bit_present)
158 if (ddc->regs->dc_gpio_aux_ctrl_5 != 0)
[all...] |
| amdgpu_gpio_service.c | 473 struct ddc *dal_gpio_create_ddc(
481 struct ddc *ddc; local in function:dal_gpio_create_ddc
486 ddc = kzalloc(sizeof(struct ddc), GFP_KERNEL);
488 if (!ddc) {
493 ddc->pin_data = dal_gpio_create(
496 if (!ddc->pin_data) {
501 ddc->pin_clock = dal_gpio_create(
504 if (!ddc->pin_clock)
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/dce120/ |
| amdgpu_hw_factory_dce120.c | 138 struct hw_ddc *ddc = HW_DDC_FROM_BASE(pin); local in function:define_ddc_registers
142 ddc->regs = &ddc_data_regs[en];
143 ddc->base.regs = &ddc_data_regs[en].gpio;
146 ddc->regs = &ddc_clk_regs[en];
147 ddc->base.regs = &ddc_clk_regs[en].gpio;
154 ddc->shifts = &ddc_shift;
155 ddc->masks = &ddc_mask;
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/dcn10/ |
| amdgpu_hw_factory_dcn10.c | 170 struct hw_ddc *ddc = HW_DDC_FROM_BASE(pin); local in function:define_ddc_registers
174 ddc->regs = &ddc_data_regs[en];
175 ddc->base.regs = &ddc_data_regs[en].gpio;
178 ddc->regs = &ddc_clk_regs[en];
179 ddc->base.regs = &ddc_clk_regs[en].gpio;
186 ddc->shifts = &ddc_shift;
187 ddc->masks = &ddc_mask;
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/dcn20/ |
| amdgpu_hw_factory_dcn20.c | 188 struct hw_ddc *ddc = HW_DDC_FROM_BASE(pin); local in function:define_ddc_registers
192 ddc->regs = &ddc_data_regs_dcn[en];
193 ddc->base.regs = &ddc_data_regs_dcn[en].gpio;
196 ddc->regs = &ddc_clk_regs_dcn[en];
197 ddc->base.regs = &ddc_clk_regs_dcn[en].gpio;
204 ddc->shifts = &ddc_shift[en];
205 ddc->masks = &ddc_mask[en];
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| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/dcn21/ |
| amdgpu_hw_factory_dcn21.c | 178 struct hw_ddc *ddc = HW_DDC_FROM_BASE(pin); local in function:define_ddc_registers
182 ddc->regs = &ddc_data_regs_dcn[en];
183 ddc->base.regs = &ddc_data_regs_dcn[en].gpio;
186 ddc->regs = &ddc_clk_regs_dcn[en];
187 ddc->base.regs = &ddc_clk_regs_dcn[en].gpio;
194 ddc->shifts = &ddc_shift[en];
195 ddc->masks = &ddc_mask[en];
|
| /src/sys/dev/fdt/ |
| hdmi_connector.c | 57 i2c_tag_t ddc; member in struct:dispcon_hdmi_connector
121 if (hdmi_connector->ddc != NULL) {
124 error = ddc_read_edid_block(hdmi_connector->ddc,
208 hdmi_connector->ddc = fdtbus_i2c_acquire(phandle, "ddc-i2c-bus");
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/amdgpu_dm/ |
| amdgpu_dm_helpers.c | 562 struct i2c_adapter *ddc; local in function:dm_helpers_read_local_edid
568 ddc = &aconnector->dm_dp_aux.aux.ddc;
570 ddc = &aconnector->i2c->base;
577 edid = drm_get_edid(&aconnector->base, ddc);
|
| /src/sys/arch/arm/nvidia/ |
| tegra_drm.h | 118 i2c_tag_t ddc; member in struct:tegra_connector
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/ |
| dc_link.h | 112 struct ddc_service *ddc; member in struct:dc_link
|
| dc_ddc_types.h | 121 struct ddc { struct
166 struct ddc *ddc_pin;
|
| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| amdgpu_connectors.c | 301 &amdgpu_connector->ddc_bus->aux.ddc);
310 &amdgpu_connector->ddc_bus->aux.ddc);
886 * with a shared ddc line (often vga + hdmi)
963 * Do a DDC probe, if DDC probe passes, get the full EDID so
965 * If the monitor is an analog monitor or we got no DDC,
967 * If we got no DDC, we do load detection on the DAC encoder object.
968 * If we got analog DDC or load detection passes on the DAC encoder
1011 * with a shared ddc line (often vga + hdmi)
1021 * shared DDC line and we have boards with DVI-D + HDMI with a share
1512 struct i2c_adapter *ddc = NULL; local in function:amdgpu_connector_add
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| radeon_connectors.c | 317 &radeon_connector->ddc_bus->aux.ddc);
326 &radeon_connector->ddc_bus->aux.ddc);
341 /* don't fetch the edid from the vbios if ddc fails and runpm is
898 /* don't fetch the edid from the vbios if ddc fails and runpm is
1057 * with a shared ddc line (often vga + hdmi)
1233 * Do a DDC probe, if DDC probe passes, get the full EDID so
1235 * If the monitor is an analog monitor or we got no DDC,
1237 * If we got no DDC, we do load detection on the DAC encoder object.
1238 * If we got analog DDC or load detection passes on the DAC encode
1870 struct i2c_adapter *ddc = NULL; local in function:radeon_add_atom_connector
2391 struct i2c_adapter *ddc = NULL; local in function:radeon_add_legacy_connector
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/ |
| amdgpu_dc.c | 2563 struct ddc_service *ddc = link->ddc; local in function:dc_submit_i2c
2566 ddc->ddc_pin,
2574 struct ddc_service *ddc = dc->res_pool->oem_device; local in function:dc_submit_i2c_oem
2577 ddc->ddc_pin,
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