| /src/usr.bin/make/unit-tests/ |
| varname-make_stack_trace.mk | 8 # disabled by default since the stack trace is stored in an environment
15 @${MAKE} -f ${MAKEFILE} disabled-compat || :
16 @${MAKE} -f ${MAKEFILE} -j1 disabled-parallel || :
20 # expect-not: in target "disabled-compat"
21 disabled-compat: .PHONY
24 # expect-not: in target "disabled-parallel"
25 disabled-parallel: .PHONY
|
| /src/sys/external/bsd/compiler_rt/dist/lib/asan/ |
| asan_activation.cc | 112 AllocatorOptions disabled = asan_deactivated_flags.allocator_options; local in function:__asan::AsanDeactivate
113 disabled.quarantine_size_mb = 0;
114 disabled.thread_local_quarantine_size_kb = 0;
116 disabled.min_redzone = Max(16, (int)SHADOW_GRANULARITY);
117 disabled.max_redzone = disabled.min_redzone;
118 disabled.alloc_dealloc_mismatch = false;
119 disabled.may_return_null = true;
120 ReInitializeAllocator(disabled);
|
| /src/sys/arch/evbarm/iq80310/ |
| iq80310_intr.c | 115 uint32_t disabled; local in function:iq80310_set_intrmask
120 disabled = (~intr_enabled) & IRQ_BITS;
122 CPLD_WRITE(IQ80310_XINT_MASK, disabled & 0x1f);
142 * NOTE: This routine must be called with interrupts disabled in the CPSR.
446 * disabled.
|
| /src/sys/external/bsd/drm2/dist/drm/i915/gt/ |
| intel_engine_user.c | 158 u32 enabled, disabled; local in function:set_scheduler_caps
161 disabled = 0;
169 disabled |= (I915_SCHEDULER_CAP_ENABLED |
176 disabled |= BIT(map[i].sched);
180 i915->caps.scheduler = enabled & ~disabled;
|
| /src/sys/dev/ic/ |
| nvme.c | 321 * isn't the desired value. Short circuit if we're already disabled.
642 bool disabled = false; local in function:nvme_shutdown
652 disabled = true;
655 if (disabled)
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/dispnv50/ |
| nouveau_dispnv50_disp.c | 798 bool disabled; member in struct:nv50_mstm
816 bool disabled; member in struct:nv50_msto
853 if (!msto->disabled)
861 msto->disabled = false;
1022 mstm->disabled = true;
1023 msto->disabled = true;
1278 if (mstm->disabled) {
1281 mstm->disabled = false;
|
| /src/sys/external/mit/xen-include-public/dist/xen/include/public/arch-x86/hvm/ |
| save.h | 409 uint32_t disabled; /* VLAPIC_xx_DISABLED */ member in struct:hvm_hw_lapic
|
| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| radeon_evergreen.c | 1811 unsigned disabled = 0; local in function:evergreen_hpd_fini
1821 disabled |= 1 << hpd;
1823 radeon_irq_kms_disable_hpd(rdev, disabled);
1844 * 2 - whole lb (7680 * 2), other crtc must be disabled
1849 * 6 - whole lb (7680 * 2), other crtc must be disabled
3477 /* enabled rb are just the one not disabled :) */
3482 /* if all the backends are disabled, fix it up here */
3514 /* RB0 disabled, RB1 enabled */
3517 /* RB1 disabled, RB0 enabled */
4509 /* don't enable anything if the ih is disabled */
[all...] |
| /src/sys/dev/usb/ |
| if_urtwn.c | 5125 bool disabled = true; local in function:urtwn_chip_stop
5177 if (disabled) {
5211 if (disabled) {
5221 if (disabled) {
|
| /src/sys/external/bsd/drm2/dist/drm/i915/display/ |
| intel_display_power.c | 270 * to be enabled, and it will only be disabled if none of the registers is
330 bool disabled; local in function:hsw_wait_for_power_well_disable
334 * Bspec doesn't require waiting for PWs to get disabled, but still do
342 wait_for((disabled = !(I915_READ(regs->driver) &
345 if (disabled)
628 "DC5 still not disabled to enable DC9.\n");
633 "Interrupts not disabled yet.\n");
647 "Interrupts not disabled yet.\n");
649 "DC5 still not disabled.\n");
907 * If DC off power well is disabled, need to enable and disable th
[all...] |
