1 /* $NetBSD: amdgpu_power_helpers.c,v 1.2 2021/12/18 23:45:07 riastradh Exp $ */ 2 3 /* Copyright 2018 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 * 23 * Authors: AMD 24 * 25 */ 26 27 #include <sys/cdefs.h> 28 __KERNEL_RCSID(0, "$NetBSD: amdgpu_power_helpers.c,v 1.2 2021/12/18 23:45:07 riastradh Exp $"); 29 30 #include "power_helpers.h" 31 #include "dc/inc/hw/dmcu.h" 32 33 #define DIV_ROUNDUP(a, b) (((a)+((b)/2))/(b)) 34 35 /* Possible Min Reduction config from least aggressive to most aggressive 36 * 0 1 2 3 4 5 6 7 8 9 10 11 12 37 * 100 98.0 94.1 94.1 85.1 80.3 75.3 69.4 60.0 57.6 50.2 49.8 40.0 % 38 */ 39 static const unsigned char min_reduction_table[13] = { 40 0xff, 0xfa, 0xf0, 0xf0, 0xd9, 0xcd, 0xc0, 0xb1, 0x99, 0x93, 0x80, 0x82, 0x66}; 41 42 /* Possible Max Reduction configs from least aggressive to most aggressive 43 * 0 1 2 3 4 5 6 7 8 9 10 11 12 44 * 96.1 89.8 85.1 80.3 69.4 64.7 64.7 50.2 39.6 30.2 30.2 30.2 19.6 % 45 */ 46 static const unsigned char max_reduction_table[13] = { 47 0xf5, 0xe5, 0xd9, 0xcd, 0xb1, 0xa5, 0xa5, 0x80, 0x65, 0x4d, 0x4d, 0x4d, 0x32}; 48 49 /* Possible ABM 2.2 Min Reduction configs from least aggressive to most aggressive 50 * 0 1 2 3 4 5 6 7 8 9 10 11 12 51 * 100 100 100 100 100 100 100 100 100 92.2 83.1 75.3 75.3 % 52 */ 53 static const unsigned char min_reduction_table_v_2_2[13] = { 54 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xeb, 0xd4, 0xc0, 0xc0}; 55 56 /* Possible ABM 2.2 Max Reduction configs from least aggressive to most aggressive 57 * 0 1 2 3 4 5 6 7 8 9 10 11 12 58 * 96.1 89.8 74.9 69.4 64.7 52.2 48.6 39.6 30.2 25.1 19.6 12.5 12.5 % 59 */ 60 static const unsigned char max_reduction_table_v_2_2[13] = { 61 0xf5, 0xe5, 0xbf, 0xb1, 0xa5, 0x85, 0x7c, 0x65, 0x4d, 0x40, 0x32, 0x20, 0x20}; 62 63 /* Predefined ABM configuration sets. We may have different configuration sets 64 * in order to satisfy different power/quality requirements. 65 */ 66 static const unsigned char abm_config[abm_defines_max_config][abm_defines_max_level] = { 67 /* ABM Level 1, ABM Level 2, ABM Level 3, ABM Level 4 */ 68 { 2, 5, 7, 8 }, /* Default - Medium aggressiveness */ 69 { 2, 5, 8, 11 }, /* Alt #1 - Increased aggressiveness */ 70 { 0, 2, 4, 8 }, /* Alt #2 - Minimal aggressiveness */ 71 { 3, 6, 10, 12 }, /* Alt #3 - Super aggressiveness */ 72 }; 73 74 struct abm_parameters { 75 unsigned char min_reduction; 76 unsigned char max_reduction; 77 unsigned char bright_pos_gain; 78 unsigned char dark_pos_gain; 79 unsigned char brightness_gain; 80 unsigned char contrast_factor; 81 unsigned char deviation_gain; 82 unsigned char min_knee; 83 unsigned char max_knee; 84 }; 85 86 static const struct abm_parameters abm_settings_config0[abm_defines_max_level] = { 87 // min_red max_red bright_pos dark_pos brightness_gain contrast deviation min_knee max_knee 88 {0xff, 0xbf, 0x20, 0x00, 0xff, 0x99, 0xb3, 0x40, 0xe0}, 89 {0xde, 0x85, 0x20, 0x00, 0xff, 0x90, 0xa8, 0x40, 0xdf}, 90 {0xb0, 0x50, 0x20, 0x00, 0xc0, 0x88, 0x78, 0x70, 0xa0}, 91 {0x82, 0x40, 0x20, 0x00, 0x00, 0xff, 0xb3, 0x70, 0x70}, 92 }; 93 94 static const struct abm_parameters abm_settings_config1[abm_defines_max_level] = { 95 // min_red max_red bright_pos dark_pos brightness_gain contrast deviation min_knee max_knee 96 {0xf0, 0xd9, 0x20, 0x00, 0x00, 0xff, 0xb3, 0x70, 0x70}, 97 {0xcd, 0xa5, 0x20, 0x00, 0x00, 0xff, 0xb3, 0x70, 0x70}, 98 {0x99, 0x65, 0x20, 0x00, 0x00, 0xff, 0xb3, 0x70, 0x70}, 99 {0x82, 0x4d, 0x20, 0x00, 0x00, 0xff, 0xb3, 0x70, 0x70}, 100 }; 101 102 static const struct abm_parameters * const abm_settings[] = { 103 abm_settings_config0, 104 abm_settings_config1, 105 }; 106 107 #define NUM_AMBI_LEVEL 5 108 #define NUM_AGGR_LEVEL 4 109 #define NUM_POWER_FN_SEGS 8 110 #define NUM_BL_CURVE_SEGS 16 111 #define IRAM_SIZE 256 112 113 #define IRAM_RESERVE_AREA_START_V2 0xF0 // reserve 0xF0~0xF6 are write by DMCU only 114 #define IRAM_RESERVE_AREA_END_V2 0xF6 // reserve 0xF0~0xF6 are write by DMCU only 115 116 #define IRAM_RESERVE_AREA_START_V2_2 0xF0 // reserve 0xF0~0xFF are write by DMCU only 117 #define IRAM_RESERVE_AREA_END_V2_2 0xFF // reserve 0xF0~0xFF are write by DMCU only 118 119 #pragma pack(push, 1) 120 /* NOTE: iRAM is 256B in size */ 121 struct iram_table_v_2 { 122 /* flags */ 123 uint16_t min_abm_backlight; /* 0x00 U16 */ 124 125 /* parameters for ABM2.0 algorithm */ 126 uint8_t min_reduction[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL]; /* 0x02 U0.8 */ 127 uint8_t max_reduction[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL]; /* 0x16 U0.8 */ 128 uint8_t bright_pos_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL]; /* 0x2a U2.6 */ 129 uint8_t bright_neg_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL]; /* 0x3e U2.6 */ 130 uint8_t dark_pos_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL]; /* 0x52 U2.6 */ 131 uint8_t dark_neg_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL]; /* 0x66 U2.6 */ 132 uint8_t iir_curve[NUM_AMBI_LEVEL]; /* 0x7a U0.8 */ 133 uint8_t deviation_gain; /* 0x7f U0.8 */ 134 135 /* parameters for crgb conversion */ 136 uint16_t crgb_thresh[NUM_POWER_FN_SEGS]; /* 0x80 U3.13 */ 137 uint16_t crgb_offset[NUM_POWER_FN_SEGS]; /* 0x90 U1.15 */ 138 uint16_t crgb_slope[NUM_POWER_FN_SEGS]; /* 0xa0 U4.12 */ 139 140 /* parameters for custom curve */ 141 /* thresholds for brightness --> backlight */ 142 uint16_t backlight_thresholds[NUM_BL_CURVE_SEGS]; /* 0xb0 U16.0 */ 143 /* offsets for brightness --> backlight */ 144 uint16_t backlight_offsets[NUM_BL_CURVE_SEGS]; /* 0xd0 U16.0 */ 145 146 /* For reading PSR State directly from IRAM */ 147 uint8_t psr_state; /* 0xf0 */ 148 uint8_t dmcu_mcp_interface_version; /* 0xf1 */ 149 uint8_t dmcu_abm_feature_version; /* 0xf2 */ 150 uint8_t dmcu_psr_feature_version; /* 0xf3 */ 151 uint16_t dmcu_version; /* 0xf4 */ 152 uint8_t dmcu_state; /* 0xf6 */ 153 154 uint16_t blRampReduction; /* 0xf7 */ 155 uint16_t blRampStart; /* 0xf9 */ 156 uint8_t dummy5; /* 0xfb */ 157 uint8_t dummy6; /* 0xfc */ 158 uint8_t dummy7; /* 0xfd */ 159 uint8_t dummy8; /* 0xfe */ 160 uint8_t dummy9; /* 0xff */ 161 }; 162 163 struct iram_table_v_2_2 { 164 /* flags */ 165 uint16_t flags; /* 0x00 U16 */ 166 167 /* parameters for ABM2.2 algorithm */ 168 uint8_t min_reduction[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL]; /* 0x02 U0.8 */ 169 uint8_t max_reduction[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL]; /* 0x16 U0.8 */ 170 uint8_t bright_pos_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL]; /* 0x2a U2.6 */ 171 uint8_t dark_pos_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL]; /* 0x3e U2.6 */ 172 uint8_t hybrid_factor[NUM_AGGR_LEVEL]; /* 0x52 U0.8 */ 173 uint8_t contrast_factor[NUM_AGGR_LEVEL]; /* 0x56 U0.8 */ 174 uint8_t deviation_gain[NUM_AGGR_LEVEL]; /* 0x5a U0.8 */ 175 uint8_t iir_curve[NUM_AMBI_LEVEL]; /* 0x5e U0.8 */ 176 uint8_t min_knee[NUM_AGGR_LEVEL]; /* 0x63 U0.8 */ 177 uint8_t max_knee[NUM_AGGR_LEVEL]; /* 0x67 U0.8 */ 178 uint16_t min_abm_backlight; /* 0x6b U16 */ 179 uint8_t pad[19]; /* 0x6d U0.8 */ 180 181 /* parameters for crgb conversion */ 182 uint16_t crgb_thresh[NUM_POWER_FN_SEGS]; /* 0x80 U3.13 */ 183 uint16_t crgb_offset[NUM_POWER_FN_SEGS]; /* 0x90 U1.15 */ 184 uint16_t crgb_slope[NUM_POWER_FN_SEGS]; /* 0xa0 U4.12 */ 185 186 /* parameters for custom curve */ 187 /* thresholds for brightness --> backlight */ 188 uint16_t backlight_thresholds[NUM_BL_CURVE_SEGS]; /* 0xb0 U16.0 */ 189 /* offsets for brightness --> backlight */ 190 uint16_t backlight_offsets[NUM_BL_CURVE_SEGS]; /* 0xd0 U16.0 */ 191 192 /* For reading PSR State directly from IRAM */ 193 uint8_t psr_state; /* 0xf0 */ 194 uint8_t dmcu_mcp_interface_version; /* 0xf1 */ 195 uint8_t dmcu_abm_feature_version; /* 0xf2 */ 196 uint8_t dmcu_psr_feature_version; /* 0xf3 */ 197 uint16_t dmcu_version; /* 0xf4 */ 198 uint8_t dmcu_state; /* 0xf6 */ 199 200 uint8_t dummy1; /* 0xf7 */ 201 uint8_t dummy2; /* 0xf8 */ 202 uint8_t dummy3; /* 0xf9 */ 203 uint8_t dummy4; /* 0xfa */ 204 uint8_t dummy5; /* 0xfb */ 205 uint8_t dummy6; /* 0xfc */ 206 uint8_t dummy7; /* 0xfd */ 207 uint8_t dummy8; /* 0xfe */ 208 uint8_t dummy9; /* 0xff */ 209 }; 210 #pragma pack(pop) 211 212 static void fill_backlight_transform_table(struct dmcu_iram_parameters params, 213 struct iram_table_v_2 *table) 214 { 215 unsigned int i; 216 unsigned int num_entries = NUM_BL_CURVE_SEGS; 217 unsigned int lut_index; 218 219 table->backlight_thresholds[0] = 0; 220 table->backlight_offsets[0] = params.backlight_lut_array[0]; 221 table->backlight_thresholds[num_entries-1] = 0xFFFF; 222 table->backlight_offsets[num_entries-1] = 223 params.backlight_lut_array[params.backlight_lut_array_size - 1]; 224 225 /* Setup all brightness levels between 0% and 100% exclusive 226 * Fills brightness-to-backlight transform table. Backlight custom curve 227 * describes transform from brightness to backlight. It will be defined 228 * as set of thresholds and set of offsets, together, implying 229 * extrapolation of custom curve into 16 uniformly spanned linear 230 * segments. Each threshold/offset represented by 16 bit entry in 231 * format U4.10. 232 */ 233 for (i = 1; i+1 < num_entries; i++) { 234 lut_index = (params.backlight_lut_array_size - 1) * i / (num_entries - 1); 235 ASSERT(lut_index < params.backlight_lut_array_size); 236 237 table->backlight_thresholds[i] = 238 cpu_to_be16(DIV_ROUNDUP((i * 65536), num_entries)); 239 table->backlight_offsets[i] = 240 cpu_to_be16(params.backlight_lut_array[lut_index]); 241 } 242 } 243 244 static void fill_backlight_transform_table_v_2_2(struct dmcu_iram_parameters params, 245 struct iram_table_v_2_2 *table) 246 { 247 unsigned int i; 248 unsigned int num_entries = NUM_BL_CURVE_SEGS; 249 unsigned int lut_index; 250 251 table->backlight_thresholds[0] = 0; 252 table->backlight_offsets[0] = params.backlight_lut_array[0]; 253 table->backlight_thresholds[num_entries-1] = 0xFFFF; 254 table->backlight_offsets[num_entries-1] = 255 params.backlight_lut_array[params.backlight_lut_array_size - 1]; 256 257 /* Setup all brightness levels between 0% and 100% exclusive 258 * Fills brightness-to-backlight transform table. Backlight custom curve 259 * describes transform from brightness to backlight. It will be defined 260 * as set of thresholds and set of offsets, together, implying 261 * extrapolation of custom curve into 16 uniformly spanned linear 262 * segments. Each threshold/offset represented by 16 bit entry in 263 * format U4.10. 264 */ 265 for (i = 1; i+1 < num_entries; i++) { 266 lut_index = (params.backlight_lut_array_size - 1) * i / (num_entries - 1); 267 ASSERT(lut_index < params.backlight_lut_array_size); 268 269 table->backlight_thresholds[i] = 270 cpu_to_be16(DIV_ROUNDUP((i * 65536), num_entries)); 271 table->backlight_offsets[i] = 272 cpu_to_be16(params.backlight_lut_array[lut_index]); 273 } 274 } 275 276 void fill_iram_v_2(struct iram_table_v_2 *ram_table, struct dmcu_iram_parameters params) 277 { 278 unsigned int set = params.set; 279 280 ram_table->min_abm_backlight = 281 cpu_to_be16(params.min_abm_backlight); 282 ram_table->deviation_gain = 0xb3; 283 284 ram_table->blRampReduction = 285 cpu_to_be16(params.backlight_ramping_reduction); 286 ram_table->blRampStart = 287 cpu_to_be16(params.backlight_ramping_start); 288 289 ram_table->min_reduction[0][0] = min_reduction_table[abm_config[set][0]]; 290 ram_table->min_reduction[1][0] = min_reduction_table[abm_config[set][0]]; 291 ram_table->min_reduction[2][0] = min_reduction_table[abm_config[set][0]]; 292 ram_table->min_reduction[3][0] = min_reduction_table[abm_config[set][0]]; 293 ram_table->min_reduction[4][0] = min_reduction_table[abm_config[set][0]]; 294 ram_table->max_reduction[0][0] = max_reduction_table[abm_config[set][0]]; 295 ram_table->max_reduction[1][0] = max_reduction_table[abm_config[set][0]]; 296 ram_table->max_reduction[2][0] = max_reduction_table[abm_config[set][0]]; 297 ram_table->max_reduction[3][0] = max_reduction_table[abm_config[set][0]]; 298 ram_table->max_reduction[4][0] = max_reduction_table[abm_config[set][0]]; 299 300 ram_table->min_reduction[0][1] = min_reduction_table[abm_config[set][1]]; 301 ram_table->min_reduction[1][1] = min_reduction_table[abm_config[set][1]]; 302 ram_table->min_reduction[2][1] = min_reduction_table[abm_config[set][1]]; 303 ram_table->min_reduction[3][1] = min_reduction_table[abm_config[set][1]]; 304 ram_table->min_reduction[4][1] = min_reduction_table[abm_config[set][1]]; 305 ram_table->max_reduction[0][1] = max_reduction_table[abm_config[set][1]]; 306 ram_table->max_reduction[1][1] = max_reduction_table[abm_config[set][1]]; 307 ram_table->max_reduction[2][1] = max_reduction_table[abm_config[set][1]]; 308 ram_table->max_reduction[3][1] = max_reduction_table[abm_config[set][1]]; 309 ram_table->max_reduction[4][1] = max_reduction_table[abm_config[set][1]]; 310 311 ram_table->min_reduction[0][2] = min_reduction_table[abm_config[set][2]]; 312 ram_table->min_reduction[1][2] = min_reduction_table[abm_config[set][2]]; 313 ram_table->min_reduction[2][2] = min_reduction_table[abm_config[set][2]]; 314 ram_table->min_reduction[3][2] = min_reduction_table[abm_config[set][2]]; 315 ram_table->min_reduction[4][2] = min_reduction_table[abm_config[set][2]]; 316 ram_table->max_reduction[0][2] = max_reduction_table[abm_config[set][2]]; 317 ram_table->max_reduction[1][2] = max_reduction_table[abm_config[set][2]]; 318 ram_table->max_reduction[2][2] = max_reduction_table[abm_config[set][2]]; 319 ram_table->max_reduction[3][2] = max_reduction_table[abm_config[set][2]]; 320 ram_table->max_reduction[4][2] = max_reduction_table[abm_config[set][2]]; 321 322 ram_table->min_reduction[0][3] = min_reduction_table[abm_config[set][3]]; 323 ram_table->min_reduction[1][3] = min_reduction_table[abm_config[set][3]]; 324 ram_table->min_reduction[2][3] = min_reduction_table[abm_config[set][3]]; 325 ram_table->min_reduction[3][3] = min_reduction_table[abm_config[set][3]]; 326 ram_table->min_reduction[4][3] = min_reduction_table[abm_config[set][3]]; 327 ram_table->max_reduction[0][3] = max_reduction_table[abm_config[set][3]]; 328 ram_table->max_reduction[1][3] = max_reduction_table[abm_config[set][3]]; 329 ram_table->max_reduction[2][3] = max_reduction_table[abm_config[set][3]]; 330 ram_table->max_reduction[3][3] = max_reduction_table[abm_config[set][3]]; 331 ram_table->max_reduction[4][3] = max_reduction_table[abm_config[set][3]]; 332 333 ram_table->bright_pos_gain[0][0] = 0x20; 334 ram_table->bright_pos_gain[0][1] = 0x20; 335 ram_table->bright_pos_gain[0][2] = 0x20; 336 ram_table->bright_pos_gain[0][3] = 0x20; 337 ram_table->bright_pos_gain[1][0] = 0x20; 338 ram_table->bright_pos_gain[1][1] = 0x20; 339 ram_table->bright_pos_gain[1][2] = 0x20; 340 ram_table->bright_pos_gain[1][3] = 0x20; 341 ram_table->bright_pos_gain[2][0] = 0x20; 342 ram_table->bright_pos_gain[2][1] = 0x20; 343 ram_table->bright_pos_gain[2][2] = 0x20; 344 ram_table->bright_pos_gain[2][3] = 0x20; 345 ram_table->bright_pos_gain[3][0] = 0x20; 346 ram_table->bright_pos_gain[3][1] = 0x20; 347 ram_table->bright_pos_gain[3][2] = 0x20; 348 ram_table->bright_pos_gain[3][3] = 0x20; 349 ram_table->bright_pos_gain[4][0] = 0x20; 350 ram_table->bright_pos_gain[4][1] = 0x20; 351 ram_table->bright_pos_gain[4][2] = 0x20; 352 ram_table->bright_pos_gain[4][3] = 0x20; 353 ram_table->bright_neg_gain[0][1] = 0x00; 354 ram_table->bright_neg_gain[0][2] = 0x00; 355 ram_table->bright_neg_gain[0][3] = 0x00; 356 ram_table->bright_neg_gain[1][0] = 0x00; 357 ram_table->bright_neg_gain[1][1] = 0x00; 358 ram_table->bright_neg_gain[1][2] = 0x00; 359 ram_table->bright_neg_gain[1][3] = 0x00; 360 ram_table->bright_neg_gain[2][0] = 0x00; 361 ram_table->bright_neg_gain[2][1] = 0x00; 362 ram_table->bright_neg_gain[2][2] = 0x00; 363 ram_table->bright_neg_gain[2][3] = 0x00; 364 ram_table->bright_neg_gain[3][0] = 0x00; 365 ram_table->bright_neg_gain[3][1] = 0x00; 366 ram_table->bright_neg_gain[3][2] = 0x00; 367 ram_table->bright_neg_gain[3][3] = 0x00; 368 ram_table->bright_neg_gain[4][0] = 0x00; 369 ram_table->bright_neg_gain[4][1] = 0x00; 370 ram_table->bright_neg_gain[4][2] = 0x00; 371 ram_table->bright_neg_gain[4][3] = 0x00; 372 ram_table->dark_pos_gain[0][0] = 0x00; 373 ram_table->dark_pos_gain[0][1] = 0x00; 374 ram_table->dark_pos_gain[0][2] = 0x00; 375 ram_table->dark_pos_gain[0][3] = 0x00; 376 ram_table->dark_pos_gain[1][0] = 0x00; 377 ram_table->dark_pos_gain[1][1] = 0x00; 378 ram_table->dark_pos_gain[1][2] = 0x00; 379 ram_table->dark_pos_gain[1][3] = 0x00; 380 ram_table->dark_pos_gain[2][0] = 0x00; 381 ram_table->dark_pos_gain[2][1] = 0x00; 382 ram_table->dark_pos_gain[2][2] = 0x00; 383 ram_table->dark_pos_gain[2][3] = 0x00; 384 ram_table->dark_pos_gain[3][0] = 0x00; 385 ram_table->dark_pos_gain[3][1] = 0x00; 386 ram_table->dark_pos_gain[3][2] = 0x00; 387 ram_table->dark_pos_gain[3][3] = 0x00; 388 ram_table->dark_pos_gain[4][0] = 0x00; 389 ram_table->dark_pos_gain[4][1] = 0x00; 390 ram_table->dark_pos_gain[4][2] = 0x00; 391 ram_table->dark_pos_gain[4][3] = 0x00; 392 ram_table->dark_neg_gain[0][0] = 0x00; 393 ram_table->dark_neg_gain[0][1] = 0x00; 394 ram_table->dark_neg_gain[0][2] = 0x00; 395 ram_table->dark_neg_gain[0][3] = 0x00; 396 ram_table->dark_neg_gain[1][0] = 0x00; 397 ram_table->dark_neg_gain[1][1] = 0x00; 398 ram_table->dark_neg_gain[1][2] = 0x00; 399 ram_table->dark_neg_gain[1][3] = 0x00; 400 ram_table->dark_neg_gain[2][0] = 0x00; 401 ram_table->dark_neg_gain[2][1] = 0x00; 402 ram_table->dark_neg_gain[2][2] = 0x00; 403 ram_table->dark_neg_gain[2][3] = 0x00; 404 ram_table->dark_neg_gain[3][0] = 0x00; 405 ram_table->dark_neg_gain[3][1] = 0x00; 406 ram_table->dark_neg_gain[3][2] = 0x00; 407 ram_table->dark_neg_gain[3][3] = 0x00; 408 ram_table->dark_neg_gain[4][0] = 0x00; 409 ram_table->dark_neg_gain[4][1] = 0x00; 410 ram_table->dark_neg_gain[4][2] = 0x00; 411 ram_table->dark_neg_gain[4][3] = 0x00; 412 413 ram_table->iir_curve[0] = 0x65; 414 ram_table->iir_curve[1] = 0x65; 415 ram_table->iir_curve[2] = 0x65; 416 ram_table->iir_curve[3] = 0x65; 417 ram_table->iir_curve[4] = 0x65; 418 419 //Gamma 2.4 420 ram_table->crgb_thresh[0] = cpu_to_be16(0x13b6); 421 ram_table->crgb_thresh[1] = cpu_to_be16(0x1648); 422 ram_table->crgb_thresh[2] = cpu_to_be16(0x18e3); 423 ram_table->crgb_thresh[3] = cpu_to_be16(0x1b41); 424 ram_table->crgb_thresh[4] = cpu_to_be16(0x1d46); 425 ram_table->crgb_thresh[5] = cpu_to_be16(0x1f21); 426 ram_table->crgb_thresh[6] = cpu_to_be16(0x2167); 427 ram_table->crgb_thresh[7] = cpu_to_be16(0x2384); 428 ram_table->crgb_offset[0] = cpu_to_be16(0x2999); 429 ram_table->crgb_offset[1] = cpu_to_be16(0x3999); 430 ram_table->crgb_offset[2] = cpu_to_be16(0x4666); 431 ram_table->crgb_offset[3] = cpu_to_be16(0x5999); 432 ram_table->crgb_offset[4] = cpu_to_be16(0x6333); 433 ram_table->crgb_offset[5] = cpu_to_be16(0x7800); 434 ram_table->crgb_offset[6] = cpu_to_be16(0x8c00); 435 ram_table->crgb_offset[7] = cpu_to_be16(0xa000); 436 ram_table->crgb_slope[0] = cpu_to_be16(0x3147); 437 ram_table->crgb_slope[1] = cpu_to_be16(0x2978); 438 ram_table->crgb_slope[2] = cpu_to_be16(0x23a2); 439 ram_table->crgb_slope[3] = cpu_to_be16(0x1f55); 440 ram_table->crgb_slope[4] = cpu_to_be16(0x1c63); 441 ram_table->crgb_slope[5] = cpu_to_be16(0x1a0f); 442 ram_table->crgb_slope[6] = cpu_to_be16(0x178d); 443 ram_table->crgb_slope[7] = cpu_to_be16(0x15ab); 444 445 fill_backlight_transform_table( 446 params, ram_table); 447 } 448 449 void fill_iram_v_2_2(struct iram_table_v_2_2 *ram_table, struct dmcu_iram_parameters params) 450 { 451 unsigned int set = params.set; 452 453 ram_table->flags = 0x0; 454 455 ram_table->min_abm_backlight = 456 cpu_to_be16(params.min_abm_backlight); 457 458 ram_table->deviation_gain[0] = 0xb3; 459 ram_table->deviation_gain[1] = 0xa8; 460 ram_table->deviation_gain[2] = 0x98; 461 ram_table->deviation_gain[3] = 0x68; 462 463 ram_table->min_reduction[0][0] = min_reduction_table_v_2_2[abm_config[set][0]]; 464 ram_table->min_reduction[1][0] = min_reduction_table_v_2_2[abm_config[set][0]]; 465 ram_table->min_reduction[2][0] = min_reduction_table_v_2_2[abm_config[set][0]]; 466 ram_table->min_reduction[3][0] = min_reduction_table_v_2_2[abm_config[set][0]]; 467 ram_table->min_reduction[4][0] = min_reduction_table_v_2_2[abm_config[set][0]]; 468 ram_table->max_reduction[0][0] = max_reduction_table_v_2_2[abm_config[set][0]]; 469 ram_table->max_reduction[1][0] = max_reduction_table_v_2_2[abm_config[set][0]]; 470 ram_table->max_reduction[2][0] = max_reduction_table_v_2_2[abm_config[set][0]]; 471 ram_table->max_reduction[3][0] = max_reduction_table_v_2_2[abm_config[set][0]]; 472 ram_table->max_reduction[4][0] = max_reduction_table_v_2_2[abm_config[set][0]]; 473 474 ram_table->min_reduction[0][1] = min_reduction_table_v_2_2[abm_config[set][1]]; 475 ram_table->min_reduction[1][1] = min_reduction_table_v_2_2[abm_config[set][1]]; 476 ram_table->min_reduction[2][1] = min_reduction_table_v_2_2[abm_config[set][1]]; 477 ram_table->min_reduction[3][1] = min_reduction_table_v_2_2[abm_config[set][1]]; 478 ram_table->min_reduction[4][1] = min_reduction_table_v_2_2[abm_config[set][1]]; 479 ram_table->max_reduction[0][1] = max_reduction_table_v_2_2[abm_config[set][1]]; 480 ram_table->max_reduction[1][1] = max_reduction_table_v_2_2[abm_config[set][1]]; 481 ram_table->max_reduction[2][1] = max_reduction_table_v_2_2[abm_config[set][1]]; 482 ram_table->max_reduction[3][1] = max_reduction_table_v_2_2[abm_config[set][1]]; 483 ram_table->max_reduction[4][1] = max_reduction_table_v_2_2[abm_config[set][1]]; 484 485 ram_table->min_reduction[0][2] = min_reduction_table_v_2_2[abm_config[set][2]]; 486 ram_table->min_reduction[1][2] = min_reduction_table_v_2_2[abm_config[set][2]]; 487 ram_table->min_reduction[2][2] = min_reduction_table_v_2_2[abm_config[set][2]]; 488 ram_table->min_reduction[3][2] = min_reduction_table_v_2_2[abm_config[set][2]]; 489 ram_table->min_reduction[4][2] = min_reduction_table_v_2_2[abm_config[set][2]]; 490 ram_table->max_reduction[0][2] = max_reduction_table_v_2_2[abm_config[set][2]]; 491 ram_table->max_reduction[1][2] = max_reduction_table_v_2_2[abm_config[set][2]]; 492 ram_table->max_reduction[2][2] = max_reduction_table_v_2_2[abm_config[set][2]]; 493 ram_table->max_reduction[3][2] = max_reduction_table_v_2_2[abm_config[set][2]]; 494 ram_table->max_reduction[4][2] = max_reduction_table_v_2_2[abm_config[set][2]]; 495 496 ram_table->min_reduction[0][3] = min_reduction_table_v_2_2[abm_config[set][3]]; 497 ram_table->min_reduction[1][3] = min_reduction_table_v_2_2[abm_config[set][3]]; 498 ram_table->min_reduction[2][3] = min_reduction_table_v_2_2[abm_config[set][3]]; 499 ram_table->min_reduction[3][3] = min_reduction_table_v_2_2[abm_config[set][3]]; 500 ram_table->min_reduction[4][3] = min_reduction_table_v_2_2[abm_config[set][3]]; 501 ram_table->max_reduction[0][3] = max_reduction_table_v_2_2[abm_config[set][3]]; 502 ram_table->max_reduction[1][3] = max_reduction_table_v_2_2[abm_config[set][3]]; 503 ram_table->max_reduction[2][3] = max_reduction_table_v_2_2[abm_config[set][3]]; 504 ram_table->max_reduction[3][3] = max_reduction_table_v_2_2[abm_config[set][3]]; 505 ram_table->max_reduction[4][3] = max_reduction_table_v_2_2[abm_config[set][3]]; 506 507 ram_table->bright_pos_gain[0][0] = 0x20; 508 ram_table->bright_pos_gain[0][1] = 0x20; 509 ram_table->bright_pos_gain[0][2] = 0x20; 510 ram_table->bright_pos_gain[0][3] = 0x20; 511 ram_table->bright_pos_gain[1][0] = 0x20; 512 ram_table->bright_pos_gain[1][1] = 0x20; 513 ram_table->bright_pos_gain[1][2] = 0x20; 514 ram_table->bright_pos_gain[1][3] = 0x20; 515 ram_table->bright_pos_gain[2][0] = 0x20; 516 ram_table->bright_pos_gain[2][1] = 0x20; 517 ram_table->bright_pos_gain[2][2] = 0x20; 518 ram_table->bright_pos_gain[2][3] = 0x20; 519 ram_table->bright_pos_gain[3][0] = 0x20; 520 ram_table->bright_pos_gain[3][1] = 0x20; 521 ram_table->bright_pos_gain[3][2] = 0x20; 522 ram_table->bright_pos_gain[3][3] = 0x20; 523 ram_table->bright_pos_gain[4][0] = 0x20; 524 ram_table->bright_pos_gain[4][1] = 0x20; 525 ram_table->bright_pos_gain[4][2] = 0x20; 526 ram_table->bright_pos_gain[4][3] = 0x20; 527 528 ram_table->dark_pos_gain[0][0] = 0x00; 529 ram_table->dark_pos_gain[0][1] = 0x00; 530 ram_table->dark_pos_gain[0][2] = 0x00; 531 ram_table->dark_pos_gain[0][3] = 0x00; 532 ram_table->dark_pos_gain[1][0] = 0x00; 533 ram_table->dark_pos_gain[1][1] = 0x00; 534 ram_table->dark_pos_gain[1][2] = 0x00; 535 ram_table->dark_pos_gain[1][3] = 0x00; 536 ram_table->dark_pos_gain[2][0] = 0x00; 537 ram_table->dark_pos_gain[2][1] = 0x00; 538 ram_table->dark_pos_gain[2][2] = 0x00; 539 ram_table->dark_pos_gain[2][3] = 0x00; 540 ram_table->dark_pos_gain[3][0] = 0x00; 541 ram_table->dark_pos_gain[3][1] = 0x00; 542 ram_table->dark_pos_gain[3][2] = 0x00; 543 ram_table->dark_pos_gain[3][3] = 0x00; 544 ram_table->dark_pos_gain[4][0] = 0x00; 545 ram_table->dark_pos_gain[4][1] = 0x00; 546 ram_table->dark_pos_gain[4][2] = 0x00; 547 ram_table->dark_pos_gain[4][3] = 0x00; 548 549 ram_table->hybrid_factor[0] = 0xff; 550 ram_table->hybrid_factor[1] = 0xff; 551 ram_table->hybrid_factor[2] = 0xff; 552 ram_table->hybrid_factor[3] = 0xc0; 553 554 ram_table->contrast_factor[0] = 0x99; 555 ram_table->contrast_factor[1] = 0x99; 556 ram_table->contrast_factor[2] = 0x90; 557 ram_table->contrast_factor[3] = 0x80; 558 559 ram_table->iir_curve[0] = 0x65; 560 ram_table->iir_curve[1] = 0x65; 561 ram_table->iir_curve[2] = 0x65; 562 ram_table->iir_curve[3] = 0x65; 563 ram_table->iir_curve[4] = 0x65; 564 565 //Gamma 2.2 566 ram_table->crgb_thresh[0] = cpu_to_be16(0x127c); 567 ram_table->crgb_thresh[1] = cpu_to_be16(0x151b); 568 ram_table->crgb_thresh[2] = cpu_to_be16(0x17d5); 569 ram_table->crgb_thresh[3] = cpu_to_be16(0x1a56); 570 ram_table->crgb_thresh[4] = cpu_to_be16(0x1c83); 571 ram_table->crgb_thresh[5] = cpu_to_be16(0x1e72); 572 ram_table->crgb_thresh[6] = cpu_to_be16(0x20f0); 573 ram_table->crgb_thresh[7] = cpu_to_be16(0x232b); 574 ram_table->crgb_offset[0] = cpu_to_be16(0x2999); 575 ram_table->crgb_offset[1] = cpu_to_be16(0x3999); 576 ram_table->crgb_offset[2] = cpu_to_be16(0x4666); 577 ram_table->crgb_offset[3] = cpu_to_be16(0x5999); 578 ram_table->crgb_offset[4] = cpu_to_be16(0x6333); 579 ram_table->crgb_offset[5] = cpu_to_be16(0x7800); 580 ram_table->crgb_offset[6] = cpu_to_be16(0x8c00); 581 ram_table->crgb_offset[7] = cpu_to_be16(0xa000); 582 ram_table->crgb_slope[0] = cpu_to_be16(0x3609); 583 ram_table->crgb_slope[1] = cpu_to_be16(0x2dfa); 584 ram_table->crgb_slope[2] = cpu_to_be16(0x27ea); 585 ram_table->crgb_slope[3] = cpu_to_be16(0x235d); 586 ram_table->crgb_slope[4] = cpu_to_be16(0x2042); 587 ram_table->crgb_slope[5] = cpu_to_be16(0x1dc3); 588 ram_table->crgb_slope[6] = cpu_to_be16(0x1b1a); 589 ram_table->crgb_slope[7] = cpu_to_be16(0x1910); 590 591 fill_backlight_transform_table_v_2_2( 592 params, ram_table); 593 } 594 595 void fill_iram_v_2_3(struct iram_table_v_2_2 *ram_table, struct dmcu_iram_parameters params) 596 { 597 unsigned int i, j; 598 unsigned int set = params.set; 599 600 ram_table->flags = 0x0; 601 602 ram_table->min_abm_backlight = 603 cpu_to_be16(params.min_abm_backlight); 604 605 for (i = 0; i < NUM_AGGR_LEVEL; i++) { 606 ram_table->hybrid_factor[i] = abm_settings[set][i].brightness_gain; 607 ram_table->contrast_factor[i] = abm_settings[set][i].contrast_factor; 608 ram_table->deviation_gain[i] = abm_settings[set][i].deviation_gain; 609 ram_table->min_knee[i] = abm_settings[set][i].min_knee; 610 ram_table->max_knee[i] = abm_settings[set][i].max_knee; 611 612 for (j = 0; j < NUM_AMBI_LEVEL; j++) { 613 ram_table->min_reduction[j][i] = abm_settings[set][i].min_reduction; 614 ram_table->max_reduction[j][i] = abm_settings[set][i].max_reduction; 615 ram_table->bright_pos_gain[j][i] = abm_settings[set][i].bright_pos_gain; 616 ram_table->dark_pos_gain[j][i] = abm_settings[set][i].dark_pos_gain; 617 } 618 } 619 620 ram_table->iir_curve[0] = 0x65; 621 ram_table->iir_curve[1] = 0x65; 622 ram_table->iir_curve[2] = 0x65; 623 ram_table->iir_curve[3] = 0x65; 624 ram_table->iir_curve[4] = 0x65; 625 626 //Gamma 2.2 627 ram_table->crgb_thresh[0] = cpu_to_be16(0x127c); 628 ram_table->crgb_thresh[1] = cpu_to_be16(0x151b); 629 ram_table->crgb_thresh[2] = cpu_to_be16(0x17d5); 630 ram_table->crgb_thresh[3] = cpu_to_be16(0x1a56); 631 ram_table->crgb_thresh[4] = cpu_to_be16(0x1c83); 632 ram_table->crgb_thresh[5] = cpu_to_be16(0x1e72); 633 ram_table->crgb_thresh[6] = cpu_to_be16(0x20f0); 634 ram_table->crgb_thresh[7] = cpu_to_be16(0x232b); 635 ram_table->crgb_offset[0] = cpu_to_be16(0x2999); 636 ram_table->crgb_offset[1] = cpu_to_be16(0x3999); 637 ram_table->crgb_offset[2] = cpu_to_be16(0x4666); 638 ram_table->crgb_offset[3] = cpu_to_be16(0x5999); 639 ram_table->crgb_offset[4] = cpu_to_be16(0x6333); 640 ram_table->crgb_offset[5] = cpu_to_be16(0x7800); 641 ram_table->crgb_offset[6] = cpu_to_be16(0x8c00); 642 ram_table->crgb_offset[7] = cpu_to_be16(0xa000); 643 ram_table->crgb_slope[0] = cpu_to_be16(0x3609); 644 ram_table->crgb_slope[1] = cpu_to_be16(0x2dfa); 645 ram_table->crgb_slope[2] = cpu_to_be16(0x27ea); 646 ram_table->crgb_slope[3] = cpu_to_be16(0x235d); 647 ram_table->crgb_slope[4] = cpu_to_be16(0x2042); 648 ram_table->crgb_slope[5] = cpu_to_be16(0x1dc3); 649 ram_table->crgb_slope[6] = cpu_to_be16(0x1b1a); 650 ram_table->crgb_slope[7] = cpu_to_be16(0x1910); 651 652 fill_backlight_transform_table_v_2_2( 653 params, ram_table); 654 } 655 656 bool dmcu_load_iram(struct dmcu *dmcu, 657 struct dmcu_iram_parameters params) 658 { 659 unsigned char ram_table[IRAM_SIZE]; 660 bool result = false; 661 662 if (dmcu == NULL) 663 return false; 664 665 if (!dmcu->funcs->is_dmcu_initialized(dmcu)) 666 return true; 667 668 memset(&ram_table, 0, sizeof(ram_table)); 669 670 if (dmcu->dmcu_version.abm_version == 0x24) { 671 fill_iram_v_2_3((struct iram_table_v_2_2 *)ram_table, params); 672 result = dmcu->funcs->load_iram( 673 dmcu, 0, (char *)(&ram_table), IRAM_RESERVE_AREA_START_V2_2); 674 } else if (dmcu->dmcu_version.abm_version == 0x23) { 675 fill_iram_v_2_3((struct iram_table_v_2_2 *)ram_table, params); 676 677 result = dmcu->funcs->load_iram( 678 dmcu, 0, (char *)(&ram_table), IRAM_RESERVE_AREA_START_V2_2); 679 } else if (dmcu->dmcu_version.abm_version == 0x22) { 680 fill_iram_v_2_2((struct iram_table_v_2_2 *)ram_table, params); 681 682 result = dmcu->funcs->load_iram( 683 dmcu, 0, (char *)(&ram_table), IRAM_RESERVE_AREA_START_V2_2); 684 } else { 685 fill_iram_v_2((struct iram_table_v_2 *)ram_table, params); 686 687 result = dmcu->funcs->load_iram( 688 dmcu, 0, (char *)(&ram_table), IRAM_RESERVE_AREA_START_V2); 689 690 if (result) 691 result = dmcu->funcs->load_iram( 692 dmcu, IRAM_RESERVE_AREA_END_V2 + 1, 693 (char *)(&ram_table) + IRAM_RESERVE_AREA_END_V2 + 1, 694 sizeof(ram_table) - IRAM_RESERVE_AREA_END_V2 - 1); 695 } 696 697 return result; 698 } 699 700
Indexes created Sat Sep 20 22:09:52 GMT 2025