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      1 /* $NetBSD: dwlpxvar.h,v 1.12 2023/12/04 00:32:10 thorpej Exp $ */
      2 
      3 /*
      4  * Copyright (c) 1997 by Matthew Jacob
      5  * NASA AMES Research Center.
      6  * All rights reserved.
      7  *
      8  * Redistribution and use in source and binary forms, with or without
      9  * modification, are permitted provided that the following conditions
     10  * are met:
     11  * 1. Redistributions of source code must retain the above copyright
     12  *    notice immediately at the beginning of the file, without modification,
     13  *    this list of conditions, and the following disclaimer.
     14  * 2. Redistributions in binary form must reproduce the above copyright
     15  *    notice, this list of conditions and the following disclaimer in the
     16  *    documentation and/or other materials provided with the distribution.
     17  * 3. The name of the author may not be used to endorse or promote products
     18  *    derived from this software without specific prior written permission.
     19  *
     20  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
     21  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     22  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     23  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
     24  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     25  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     26  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     27  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     28  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     29  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     30  * SUCH DAMAGE.
     31  */
     32 
     33 #include <sys/extent.h>
     34 #include <sys/vmem_impl.h>
     35 
     36 #include <dev/pci/pcivar.h>
     37 
     38 #include <alpha/pci/pci_sgmap_pte32.h>
     39 
     40 #define	DWLPX_IO_NBTS		VMEM_EST_BTCOUNT(2, 8)
     41 #define	DWLPX_D_MEM_NBTS	VMEM_EST_BTCOUNT(1, 8)
     42 #define	DWLPX_S_MEM_NBTS	VMEM_EST_BTCOUNT(2, 8)
     43 
     44 /*
     45  * DWLPX configuration.
     46  */
     47 struct dwlpx_config {
     48 	int				cc_initted;
     49 	struct alpha_bus_space		cc_iot;
     50 	struct alpha_bus_space		cc_memt;
     51 	vmem_t *			cc_io_arena;
     52 	vmem_t *			cc_d_mem_arena;
     53 	vmem_t *			cc_s_mem_arena;
     54 	struct alpha_pci_chipset	cc_pc;
     55 	struct dwlpx_softc *		cc_sc;	/* back pointer */
     56 	struct vmem			cc_io_arena_store;
     57 	struct vmem			cc_d_mem_arena_store;
     58 	struct vmem			cc_s_mem_arena_store;
     59 	struct vmem_btag		cc_io_btag_store[DWLPX_IO_NBTS];
     60 	struct vmem_btag		cc_d_mem_btag_store[DWLPX_D_MEM_NBTS];
     61 	struct vmem_btag		cc_s_mem_btag_store[DWLPX_S_MEM_NBTS];
     62 	unsigned long			cc_sysbase;	/* shorthand */
     63 	struct alpha_bus_dma_tag	cc_dmat_direct;
     64 	struct alpha_bus_dma_tag	cc_dmat_sgmap;
     65 	struct alpha_sgmap		cc_sgmap;
     66 };
     67 
     68 struct dwlpx_softc {
     69 	device_t		dwlpx_dev;
     70 	struct dwlpx_config	dwlpx_cc;	/* config info */
     71 	uint16_t		dwlpx_dtype;	/* Node Type */
     72 	uint8_t		dwlpx_node;	/* TurboLaser Node */
     73 	uint8_t		dwlpx_hosenum;	/* Hose Number */
     74 	uint8_t		dwlpx_nhpc;	/* # of hpcs */
     75 	uint8_t		dwlpx_sgmapsz;	/* size of SGMAP */
     76 };
     77 #define	DWLPX_NONE	0
     78 #define	DWLPX_SG32K	1
     79 #define	DWLPX_SG64K	2
     80 #define	DWLPX_SG128K	3
     81 
     82 void	dwlpx_init(struct dwlpx_softc *);
     83 void	dwlpx_pci_init(pci_chipset_tag_t, void *);
     84 void	dwlpx_dma_init(struct dwlpx_config *);
     85 
     86 void	dwlpx_bus_io_init(bus_space_tag_t, void *);
     87 void	dwlpx_bus_mem_init(bus_space_tag_t, void *);
     88 
     89 /*
     90  * Each DWLPX supports up to 15 devices, 12 of which are PCI slots.
     91  *
     92  * Since the STD I/O modules in slots 12-14 are really a PCI-EISA
     93  * bridge, we'll punt on those for the moment.
     94  */
     95 #define	DWLPX_MAXDEV	12
     96 
     97 #define	DWLPX_NIONODE	5
     98 #define	DWLPX_NHOSE	4
     99 
    100 /*
    101  * Default values to put into DWLPX IMASK register(s)
    102  */
    103 #define	DWLPX_IMASK_DFLT	\
    104 	(1 << 24) |	/* IPL 17 for error interrupts */ \
    105 	(1 << 17) |	/* IPL 14 for device interrupts */ \
    106 	(1 << 16)	/* Enable Error Interrupts */
    107