1 /* $NetBSD: ebus.c,v 1.69 2022/01/22 11:49:17 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1999, 2000, 2001 Matthew R. Green 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: ebus.c,v 1.69 2022/01/22 11:49:17 thorpej Exp $"); 31 32 #include "opt_ddb.h" 33 34 /* 35 * UltraSPARC 5 and beyond ebus support. 36 * 37 * note that this driver is not complete: 38 * - interrupt establish is written and appears to work 39 * - bus map code is written and appears to work 40 * - ebus2 DMA code is completely unwritten, we just punt to 41 * the iommu. 42 */ 43 44 #ifdef DEBUG 45 #define EDB_PROM 0x01 46 #define EDB_CHILD 0x02 47 #define EDB_INTRMAP 0x04 48 #define EDB_BUSMAP 0x08 49 #define EDB_BUSDMA 0x10 50 #define EDB_INTR 0x20 51 int ebus_debug = 0x0; 52 #define DPRINTF(l, s) do { if (ebus_debug & l) printf s; } while (0) 53 #else 54 #define DPRINTF(l, s) 55 #endif 56 57 #include <sys/param.h> 58 #include <sys/conf.h> 59 #include <sys/device.h> 60 #include <sys/errno.h> 61 #include <sys/extent.h> 62 #include <sys/malloc.h> 63 #include <sys/kmem.h> 64 #include <sys/systm.h> 65 #include <sys/time.h> 66 67 #define _SPARC_BUS_DMA_PRIVATE 68 #include <sys/bus.h> 69 #include <machine/autoconf.h> 70 #include <machine/openfirm.h> 71 72 #include <dev/pci/pcivar.h> 73 #include <dev/pci/pcireg.h> 74 #include <dev/pci/pcidevs.h> 75 76 #include <dev/ebus/ebusreg.h> 77 #include <dev/ebus/ebusvar.h> 78 #include <sparc64/dev/ebusvar.h> 79 80 int ebus_match(device_t, cfdata_t, void *); 81 void ebus_attach(device_t, device_t, void *); 82 83 CFATTACH_DECL_NEW(ebus, sizeof(struct ebus_softc), 84 ebus_match, ebus_attach, NULL, NULL); 85 86 /* 87 * here are our bus space and bus DMA routines. 88 */ 89 static int _ebus_bus_map(bus_space_tag_t, bus_addr_t, bus_size_t, int, vaddr_t, 90 bus_space_handle_t *); 91 static void *ebus_intr_establish(bus_space_tag_t, int, int, int (*)(void *), 92 void *, void(*)(void)); 93 94 int 95 ebus_match(device_t parent, cfdata_t match, void *aux) 96 { 97 struct pci_attach_args *pa = aux; 98 char *name; 99 int node; 100 101 /* Only attach if there's a PROM node. */ 102 node = PCITAG_NODE(pa->pa_tag); 103 if (node == -1) 104 return (0); 105 106 if (PCI_CLASS(pa->pa_class) != PCI_CLASS_BRIDGE) 107 return (0); 108 109 /* Match a real ebus */ 110 name = prom_getpropstring(node, "name"); 111 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SUN && 112 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SUN_EBUS && 113 strcmp(name, "ebus") == 0) 114 return (1); 115 116 /* Or a real ebus III */ 117 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SUN && 118 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SUN_EBUSIII && 119 strcmp(name, "ebus") == 0) 120 return (1); 121 122 /* Or a PCI-ISA bridge XXX I hope this is on-board. */ 123 if (PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_BRIDGE_ISA) { 124 return (1); 125 } 126 127 /* Or the Altera bridge on SPARCle */ 128 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ALTERA && 129 PCI_PRODUCT(pa->pa_id) == 0 && 130 strcmp(name, "ebus") == 0) 131 return (1); 132 133 return (0); 134 } 135 136 /* 137 * attach an ebus and all its children. this code is modeled 138 * after the sbus code which does similar things. 139 */ 140 void 141 ebus_attach(device_t parent, device_t self, void *aux) 142 { 143 struct ebus_softc *sc = device_private(self); 144 struct pci_attach_args *pa = aux; 145 struct ebus_attach_args eba; 146 struct ebus_interrupt_map_mask *immp; 147 int node, nmapmask, error; 148 char devinfo[256]; 149 150 sc->sc_dev = self; 151 152 aprint_naive("\n"); 153 154 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo)); 155 aprint_normal(": %s, revision 0x%02x\n", devinfo, 156 PCI_REVISION(pa->pa_class)); 157 158 sc->sc_memtag = pa->pa_memt; 159 sc->sc_iotag = pa->pa_iot; 160 sc->sc_childbustag = ebus_alloc_bus_tag(sc, PCI_MEMORY_BUS_SPACE); 161 sc->sc_dmatag = pa->pa_dmat; 162 163 node = PCITAG_NODE(pa->pa_tag); 164 if (node == -1) 165 panic("could not find ebus node"); 166 167 sc->sc_node = node; 168 169 /* 170 * fill in our softc with information from the prom 171 */ 172 sc->sc_intmap = NULL; 173 sc->sc_range = NULL; 174 sc->sc_nintmap = 0; 175 error = prom_getprop(node, "interrupt-map", 176 sizeof(struct ebus_interrupt_map), 177 &sc->sc_nintmap, &sc->sc_intmap); 178 switch (error) { 179 case 0: 180 immp = &sc->sc_intmapmask; 181 nmapmask = sizeof(*immp); 182 error = prom_getprop(node, "interrupt-map-mask", 183 sizeof(struct ebus_interrupt_map_mask), &nmapmask, 184 &immp); 185 if (error) 186 panic("could not get ebus interrupt-map-mask, error %d", 187 error); 188 if (nmapmask != 1) 189 panic("ebus interrupt-map-mask is broken"); 190 break; 191 case ENOENT: 192 break; 193 default: 194 panic("ebus interrupt-map: error %d", error); 195 break; 196 } 197 198 error = prom_getprop(node, "ranges", sizeof(struct ebus_ranges), 199 &sc->sc_nrange, &sc->sc_range); 200 if (error) 201 panic("ebus ranges: error %d", error); 202 203 /* 204 * now attach all our children 205 */ 206 DPRINTF(EDB_CHILD, ("ebus node %08x, searching children...\n", node)); 207 devhandle_t selfh = device_handle(self); 208 for (node = firstchild(node); node; node = nextsibling(node)) { 209 char *name = prom_getpropstring(node, "name"); 210 211 if (ebus_setup_attach_args(sc, node, &eba) != 0) { 212 aprint_error("ebus_attach: %s: incomplete\n", name); 213 continue; 214 } else { 215 DPRINTF(EDB_CHILD, ("- found child `%s', attaching\n", 216 eba.ea_name)); 217 (void)config_found(self, &eba, ebus_print, 218 CFARGS(.devhandle = prom_node_to_devhandle(selfh, 219 node))); 220 } 221 ebus_destroy_attach_args(&eba); 222 } 223 } 224 225 int ebus_setup_attach_args(struct ebus_softc *, int, 226 struct ebus_attach_args *); 227 int 228 ebus_setup_attach_args(struct ebus_softc *sc, int node, 229 struct ebus_attach_args *ea) 230 { 231 int n, rv; 232 233 memset(ea, 0, sizeof(struct ebus_attach_args)); 234 n = 0; 235 rv = prom_getprop(node, "name", 1, &n, &ea->ea_name); 236 if (rv != 0) 237 return (rv); 238 KASSERT(ea->ea_name[n-1] == '\0'); 239 240 ea->ea_node = node; 241 ea->ea_bustag = sc->sc_childbustag; 242 ea->ea_dmatag = sc->sc_dmatag; 243 244 rv = prom_getprop(node, "reg", sizeof(struct ebus_regs), &ea->ea_nreg, 245 &ea->ea_reg); 246 if (rv) 247 return (rv); 248 249 rv = prom_getprop(node, "address", sizeof(uint32_t), &ea->ea_nvaddr, 250 &ea->ea_vaddr); 251 if (rv != ENOENT) { 252 if (rv) 253 return (rv); 254 255 if (ea->ea_nreg != ea->ea_nvaddr) 256 printf("ebus loses: device %s: %d regs and %d addrs\n", 257 ea->ea_name, ea->ea_nreg, ea->ea_nvaddr); 258 } else 259 ea->ea_nvaddr = 0; 260 261 if (prom_getprop(node, "interrupts", sizeof(uint32_t), &ea->ea_nintr, 262 &ea->ea_intr)) 263 ea->ea_nintr = 0; 264 else 265 ebus_find_ino(sc, ea); 266 267 return (0); 268 } 269 270 void 271 ebus_destroy_attach_args(struct ebus_attach_args *ea) 272 { 273 274 if (ea->ea_name) 275 free((void *)ea->ea_name, M_DEVBUF); 276 if (ea->ea_reg) 277 free((void *)ea->ea_reg, M_DEVBUF); 278 if (ea->ea_intr) 279 free((void *)ea->ea_intr, M_DEVBUF); 280 if (ea->ea_vaddr) 281 free((void *)ea->ea_vaddr, M_DEVBUF); 282 } 283 284 int 285 ebus_print(void *aux, const char *p) 286 { 287 struct ebus_attach_args *ea = aux; 288 int i; 289 290 if (p) 291 aprint_normal("%s at %s", ea->ea_name, p); 292 for (i = 0; i < ea->ea_nreg; i++) 293 aprint_normal("%s %x-%x", i == 0 ? " addr" : ",", 294 ea->ea_reg[i].lo, 295 ea->ea_reg[i].lo + ea->ea_reg[i].size - 1); 296 for (i = 0; i < ea->ea_nintr; i++) 297 aprint_normal(" ipl %x", ea->ea_intr[i]); 298 return (UNCONF); 299 } 300 301 302 /* 303 * find the INO values for each interrupt and fill them in. 304 * 305 * for each "reg" property of this device, mask its hi and lo 306 * values with the "interrupt-map-mask"'s hi/lo values, and also 307 * mask the interrupt number with the interrupt mask. search the 308 * "interrupt-map" list for matching values of hi, lo and interrupt 309 * to give the INO for this interrupt. 310 */ 311 void 312 ebus_find_ino(struct ebus_softc *sc, struct ebus_attach_args *ea) 313 { 314 uint32_t hi, lo, intr; 315 int i, j, k; 316 317 if (sc->sc_nintmap == 0) { 318 for (i = 0; i < ea->ea_nintr; i++) { 319 OF_mapintr(ea->ea_node, &ea->ea_intr[i], 320 sizeof(ea->ea_intr[0]), 321 sizeof(ea->ea_intr[0])); 322 } 323 return; 324 } 325 326 DPRINTF(EDB_INTRMAP, 327 ("ebus_find_ino: searching %d interrupts", ea->ea_nintr)); 328 329 for (j = 0; j < ea->ea_nintr; j++) { 330 331 intr = ea->ea_intr[j] & sc->sc_intmapmask.intr; 332 333 DPRINTF(EDB_INTRMAP, 334 ("; intr %x masked to %x", ea->ea_intr[j], intr)); 335 for (i = 0; i < ea->ea_nreg; i++) { 336 hi = ea->ea_reg[i].hi & sc->sc_intmapmask.hi; 337 lo = ea->ea_reg[i].lo & sc->sc_intmapmask.lo; 338 339 DPRINTF(EDB_INTRMAP, 340 ("; reg hi.lo %08x.%08x masked to %08x.%08x", 341 ea->ea_reg[i].hi, ea->ea_reg[i].lo, hi, lo)); 342 for (k = 0; k < sc->sc_nintmap; k++) { 343 DPRINTF(EDB_INTRMAP, 344 ("; checking hi.lo %08x.%08x intr %x", 345 sc->sc_intmap[k].hi, sc->sc_intmap[k].lo, 346 sc->sc_intmap[k].intr)); 347 if (hi == sc->sc_intmap[k].hi && 348 lo == sc->sc_intmap[k].lo && 349 intr == sc->sc_intmap[k].intr) { 350 ea->ea_intr[j] = 351 sc->sc_intmap[k].cintr; 352 DPRINTF(EDB_INTRMAP, 353 ("; FOUND IT! changing to %d\n", 354 sc->sc_intmap[k].cintr)); 355 goto next_intr; 356 } 357 } 358 } 359 next_intr:; 360 } 361 } 362 363 /* 364 * bus space support. <sparc64/dev/psychoreg.h> has a discussion 365 * about PCI physical addresses, which also applies to ebus. 366 */ 367 bus_space_tag_t 368 ebus_alloc_bus_tag(struct ebus_softc *sc, int type) 369 { 370 bus_space_tag_t bt; 371 372 bt = kmem_zalloc(sizeof(*bt), KM_SLEEP); 373 bt->cookie = sc; 374 bt->parent = sc->sc_memtag; 375 bt->type = type; 376 bt->sparc_bus_map = _ebus_bus_map; 377 bt->sparc_bus_mmap = ebus_bus_mmap; 378 bt->sparc_intr_establish = ebus_intr_establish; 379 return (bt); 380 } 381 382 static int 383 _ebus_bus_map(bus_space_tag_t t, bus_addr_t ba, bus_size_t size, int flags, 384 vaddr_t va, bus_space_handle_t *hp) 385 { 386 struct ebus_softc *sc = t->cookie; 387 paddr_t offset; 388 u_int bar; 389 int i, ss; 390 391 bar = BUS_ADDR_IOSPACE(ba); 392 offset = BUS_ADDR_PADDR(ba); 393 394 DPRINTF(EDB_BUSMAP, 395 ("\n_ebus_bus_map: bar %d offset %08x sz %x flags %x va %p\n", 396 (int)bar, (uint32_t)offset, (uint32_t)size, 397 flags, (void *)va)); 398 399 for (i = 0; i < sc->sc_nrange; i++) { 400 bus_addr_t pciaddr; 401 402 if (bar != sc->sc_range[i].child_hi) 403 continue; 404 if (offset < sc->sc_range[i].child_lo || 405 (offset + size) > 406 (sc->sc_range[i].child_lo + sc->sc_range[i].size)) 407 continue; 408 409 /* Isolate address space and find the right tag */ 410 ss = (sc->sc_range[i].phys_hi>>24)&3; 411 switch (ss) { 412 case 1: /* I/O space */ 413 t = sc->sc_iotag; 414 break; 415 case 2: /* Memory space */ 416 t = sc->sc_memtag; 417 break; 418 case 0: /* Config space */ 419 case 3: /* 64-bit Memory space */ 420 default: /* WTF? */ 421 /* We don't handle these */ 422 panic("_ebus_bus_map: illegal space %x", ss); 423 break; 424 } 425 pciaddr = ((bus_addr_t)sc->sc_range[i].phys_mid << 32UL) | 426 sc->sc_range[i].phys_lo; 427 pciaddr += offset; 428 429 DPRINTF(EDB_BUSMAP, 430 ("_ebus_bus_map: mapping to PCI addr %x\n", 431 (uint32_t)pciaddr)); 432 433 /* pass it onto the psycho */ 434 return (bus_space_map(t, pciaddr, size, flags, hp)); 435 } 436 DPRINTF(EDB_BUSMAP, (": FAILED\n")); 437 return (EINVAL); 438 } 439 440 paddr_t 441 ebus_bus_mmap(bus_space_tag_t t, bus_addr_t paddr, off_t off, int prot, 442 int flags) 443 { 444 bus_addr_t offset = paddr; 445 struct ebus_softc *sc = t->cookie; 446 int i; 447 448 for (i = 0; i < sc->sc_nrange; i++) { 449 bus_addr_t paddr1 = 450 ((bus_addr_t)sc->sc_range[i].child_hi << 32) | 451 sc->sc_range[i].child_lo; 452 453 if (offset != paddr1) 454 continue; 455 456 DPRINTF(EDB_BUSMAP, ("\n_ebus_bus_mmap: mapping paddr %qx\n", 457 (unsigned long long)paddr1)); 458 return (bus_space_mmap(sc->sc_memtag, paddr1, off, 459 prot, flags)); 460 } 461 462 return (-1); 463 } 464 465 /* 466 * install an interrupt handler for a ebus device 467 */ 468 void * 469 ebus_intr_establish(bus_space_tag_t t, int pri, int level, 470 int (*handler)(void *), void *arg, void (*fastvec)(void) /* ignored */) 471 { 472 473 return (bus_intr_establish(t->parent, pri, level, handler, arg)); 474 } 475
Indexes created Thu Sep 25 15:09:46 GMT 2025