| /src/sys/arch/arm/samsung/ |
| exynos5410_clock.c | 649 struct exynos_div_clk *ediv = &eclk->u.div; local in function:exynos5410_clock_get_rate_div
657 const uint32_t v = CLOCK_READ(sc, ediv->reg);
658 const u_int div = __SHIFTOUT(v, ediv->bits);
667 struct exynos_div_clk *ediv = &eclk->u.div; local in function:exynos5410_clock_set_rate_div
677 for (tmp_div = 0; tmp_div < __SHIFTOUT_MASK(ediv->bits); tmp_div++) {
687 uint32_t v = CLOCK_READ(sc, ediv->reg);
688 v &= ~ediv->bits;
689 v |= __SHIFTIN(new_div, ediv->bits);
690 CLOCK_WRITE(sc, ediv->reg, v);
|
| exynos5422_clock.c | 826 struct exynos_div_clk *ediv = &eclk->u.div; local in function:exynos5422_clock_get_rate_div
834 const uint32_t v = CLOCK_READ(sc, ediv->reg);
835 const u_int div = __SHIFTOUT(v, ediv->bits);
844 struct exynos_div_clk *ediv = &eclk->u.div; local in function:exynos5422_clock_set_rate_div
854 for (tmp_div = 0; tmp_div < __SHIFTOUT_MASK(ediv->bits); tmp_div++) {
864 uint32_t v = CLOCK_READ(sc, ediv->reg);
865 v &= ~ediv->bits;
866 v |= __SHIFTIN(new_div, ediv->bits);
867 CLOCK_WRITE(sc, ediv->reg, v);
|
