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      1 /*	$NetBSD: execlist.h,v 1.2 2021/12/18 23:45:31 riastradh Exp $	*/
      2 
      3 /*
      4  * Copyright(c) 2011-2016 Intel Corporation. All rights reserved.
      5  *
      6  * Permission is hereby granted, free of charge, to any person obtaining a
      7  * copy of this software and associated documentation files (the "Software"),
      8  * to deal in the Software without restriction, including without limitation
      9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
     10  * and/or sell copies of the Software, and to permit persons to whom the
     11  * Software is furnished to do so, subject to the following conditions:
     12  *
     13  * The above copyright notice and this permission notice (including the next
     14  * paragraph) shall be included in all copies or substantial portions of the
     15  * Software.
     16  *
     17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
     21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
     22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
     23  * SOFTWARE.
     24  *
     25  * Authors:
     26  *    Zhiyuan Lv <zhiyuan.lv (at) intel.com>
     27  *    Zhi Wang <zhi.a.wang (at) intel.com>
     28  *
     29  * Contributors:
     30  *    Min He <min.he (at) intel.com>
     31  *    Bing Niu <bing.niu (at) intel.com>
     32  *    Ping Gao <ping.a.gao (at) intel.com>
     33  *    Tina Zhang <tina.zhang (at) intel.com>
     34  *
     35  */
     36 
     37 #ifndef _GVT_EXECLIST_H_
     38 #define _GVT_EXECLIST_H_
     39 
     40 #include <linux/types.h>
     41 
     42 struct execlist_ctx_descriptor_format {
     43 	union {
     44 		u32 ldw;
     45 		struct {
     46 			u32 valid                  : 1;
     47 			u32 force_pd_restore       : 1;
     48 			u32 force_restore          : 1;
     49 			u32 addressing_mode        : 2;
     50 			u32 llc_coherency          : 1;
     51 			u32 fault_handling         : 2;
     52 			u32 privilege_access       : 1;
     53 			u32 reserved               : 3;
     54 			u32 lrca                   : 20;
     55 		};
     56 	};
     57 	union {
     58 		u32 udw;
     59 		u32 context_id;
     60 	};
     61 };
     62 
     63 struct execlist_status_format {
     64 	union {
     65 		u32 ldw;
     66 		struct {
     67 			u32 current_execlist_pointer       :1;
     68 			u32 execlist_write_pointer         :1;
     69 			u32 execlist_queue_full            :1;
     70 			u32 execlist_1_valid               :1;
     71 			u32 execlist_0_valid               :1;
     72 			u32 last_ctx_switch_reason         :9;
     73 			u32 current_active_elm_status      :2;
     74 			u32 arbitration_enable             :1;
     75 			u32 execlist_1_active              :1;
     76 			u32 execlist_0_active              :1;
     77 			u32 reserved                       :13;
     78 		};
     79 	};
     80 	union {
     81 		u32 udw;
     82 		u32 context_id;
     83 	};
     84 };
     85 
     86 struct execlist_context_status_pointer_format {
     87 	union {
     88 		u32 dw;
     89 		struct {
     90 			u32 write_ptr              :3;
     91 			u32 reserved               :5;
     92 			u32 read_ptr               :3;
     93 			u32 reserved2              :5;
     94 			u32 mask                   :16;
     95 		};
     96 	};
     97 };
     98 
     99 struct execlist_context_status_format {
    100 	union {
    101 		u32 ldw;
    102 		struct {
    103 			u32 idle_to_active         :1;
    104 			u32 preempted              :1;
    105 			u32 element_switch         :1;
    106 			u32 active_to_idle         :1;
    107 			u32 context_complete       :1;
    108 			u32 wait_on_sync_flip      :1;
    109 			u32 wait_on_vblank         :1;
    110 			u32 wait_on_semaphore      :1;
    111 			u32 wait_on_scanline       :1;
    112 			u32 reserved               :2;
    113 			u32 semaphore_wait_mode    :1;
    114 			u32 display_plane          :3;
    115 			u32 lite_restore           :1;
    116 			u32 reserved_2             :16;
    117 		};
    118 	};
    119 	union {
    120 		u32 udw;
    121 		u32 context_id;
    122 	};
    123 };
    124 
    125 struct execlist_mmio_pair {
    126 	u32 addr;
    127 	u32 val;
    128 };
    129 
    130 /* The first 52 dwords in register state context */
    131 struct execlist_ring_context {
    132 	u32 nop1;
    133 	u32 lri_cmd_1;
    134 	struct execlist_mmio_pair ctx_ctrl;
    135 	struct execlist_mmio_pair ring_header;
    136 	struct execlist_mmio_pair ring_tail;
    137 	struct execlist_mmio_pair rb_start;
    138 	struct execlist_mmio_pair rb_ctrl;
    139 	struct execlist_mmio_pair bb_cur_head_UDW;
    140 	struct execlist_mmio_pair bb_cur_head_LDW;
    141 	struct execlist_mmio_pair bb_state;
    142 	struct execlist_mmio_pair second_bb_addr_UDW;
    143 	struct execlist_mmio_pair second_bb_addr_LDW;
    144 	struct execlist_mmio_pair second_bb_state;
    145 	struct execlist_mmio_pair bb_per_ctx_ptr;
    146 	struct execlist_mmio_pair rcs_indirect_ctx;
    147 	struct execlist_mmio_pair rcs_indirect_ctx_offset;
    148 	u32 nop2;
    149 	u32 nop3;
    150 	u32 nop4;
    151 	u32 lri_cmd_2;
    152 	struct execlist_mmio_pair ctx_timestamp;
    153 	/*
    154 	 * pdps[8]={ pdp3_UDW, pdp3_LDW, pdp2_UDW, pdp2_LDW,
    155 	 *           pdp1_UDW, pdp1_LDW, pdp0_UDW, pdp0_LDW}
    156 	 */
    157 	struct execlist_mmio_pair pdps[8];
    158 };
    159 
    160 struct intel_vgpu_elsp_dwords {
    161 	u32 data[4];
    162 	u32 index;
    163 };
    164 
    165 struct intel_vgpu_execlist_slot {
    166 	struct execlist_ctx_descriptor_format ctx[2];
    167 	u32 index;
    168 };
    169 
    170 struct intel_vgpu_execlist {
    171 	struct intel_vgpu_execlist_slot slot[2];
    172 	struct intel_vgpu_execlist_slot *running_slot;
    173 	struct intel_vgpu_execlist_slot *pending_slot;
    174 	struct execlist_ctx_descriptor_format *running_context;
    175 	int ring_id;
    176 	struct intel_vgpu *vgpu;
    177 	struct intel_vgpu_elsp_dwords elsp_dwords;
    178 };
    179 
    180 void intel_vgpu_clean_execlist(struct intel_vgpu *vgpu);
    181 
    182 int intel_vgpu_init_execlist(struct intel_vgpu *vgpu);
    183 
    184 int intel_vgpu_submit_execlist(struct intel_vgpu *vgpu, int ring_id);
    185 
    186 void intel_vgpu_reset_execlist(struct intel_vgpu *vgpu,
    187 			       intel_engine_mask_t engine_mask);
    188 
    189 #endif /*_GVT_EXECLIST_H_*/
    190