| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/fifo/ |
| channv04.h | 14 struct nvkm_gpuobj *engn[NVKM_SUBDEV_NR]; member in struct:nv04_fifo_chan
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| changf100.h | 20 } engn[NVKM_SUBDEV_NR]; member in struct:gf100_fifo_chan
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| channv50.h | 20 struct nvkm_gpuobj *engn[NVKM_SUBDEV_NR]; member in struct:nv50_fifo_chan
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| changk104.h | 24 } engn[NVKM_SUBDEV_NR]; member in struct:gk104_fifo_chan
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| nouveau_nvkm_engine_fifo_chang84.c | 102 u32 engn, save; local in function:g84_fifo_chan_engine_fini
110 engn = g84_fifo_chan_engine(engine);
111 save = nvkm_mask(device, 0x002520, 0x0000003f, 1 << engn);
142 struct nvkm_gpuobj *engn = chan->engn[engine->subdev.index]; local in function:g84_fifo_chan_engine_init
149 limit = engn->addr + engn->size - 1;
150 start = engn->addr;
170 int engn = engine->subdev.index; local in function:g84_fifo_chan_engine_ctor
175 return nvkm_object_bind(object, NULL, 0, &chan->engn[engn])
[all...] |
| nouveau_nvkm_engine_fifo_channv50.c | 111 struct nvkm_gpuobj *engn = chan->engn[engine->subdev.index]; local in function:nv50_fifo_chan_engine_init
118 limit = engn->addr + engn->size - 1;
119 start = engn->addr;
138 nvkm_gpuobj_del(&chan->engn[engine->subdev.index]);
147 int engn = engine->subdev.index; local in function:nv50_fifo_chan_engine_ctor
152 return nvkm_object_bind(object, NULL, 0, &chan->engn[engn]);
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| nouveau_nvkm_engine_fifo_dmanv40.c | 107 inst = chan->engn[engine->subdev.index]->addr >> 4;
129 nvkm_gpuobj_del(&chan->engn[engine->subdev.index]);
138 const int engn = engine->subdev.index; local in function:nv40_fifo_dma_engine_ctor
144 return nvkm_object_bind(object, NULL, 0, &chan->engn[engn]);
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| nouveau_nvkm_engine_fifo_chan.c | 50 struct nvkm_fifo_engn *engn = &chan->engn[engine->subdev.index]; local in function:nvkm_fifo_chan_child_fini
54 if (--engn->usecount)
66 if (engn->object) {
67 ret = nvkm_object_fini(engn->object, suspend);
83 struct nvkm_fifo_engn *engn = &chan->engn[engine->subdev.index]; local in function:nvkm_fifo_chan_child_init
87 if (engn->usecount++)
90 if (engn->object) {
91 ret = nvkm_object_init(engn->object)
116 struct nvkm_fifo_engn *engn = &chan->engn[engine->subdev.index]; local in function:nvkm_fifo_chan_child_del
143 struct nvkm_fifo_engn *engn = &chan->engn[engine->subdev.index]; local in function:nvkm_fifo_chan_child_new
[all...] |
| nouveau_nvkm_engine_fifo_gpfifogf100.c | 119 u64 addr = chan->engn[engine->subdev.index].vma->addr;
134 nvkm_vmm_put(chan->base.vmm, &chan->engn[engine->subdev.index].vma);
135 nvkm_gpuobj_del(&chan->engn[engine->subdev.index].inst);
144 int engn = engine->subdev.index; local in function:gf100_fifo_gpfifo_engine_ctor
150 ret = nvkm_object_bind(object, NULL, 0, &chan->engn[engn].inst);
154 ret = nvkm_vmm_get(chan->base.vmm, 12, chan->engn[engn].inst->size,
155 &chan->engn[engn].vma)
[all...] |
| nouveau_nvkm_engine_fifo_gpfifogk104.c | 138 u64 addr = chan->engn[engine->subdev.index].vma->addr;
159 nvkm_vmm_put(chan->base.vmm, &chan->engn[engine->subdev.index].vma);
160 nvkm_gpuobj_del(&chan->engn[engine->subdev.index].inst);
169 int engn = engine->subdev.index; local in function:gk104_fifo_gpfifo_engine_ctor
175 ret = nvkm_object_bind(object, NULL, 0, &chan->engn[engn].inst);
179 ret = nvkm_vmm_get(chan->base.vmm, 12, chan->engn[engn].inst->size,
180 &chan->engn[engn].vma)
[all...] |
| nouveau_nvkm_engine_fifo_gf100.c | 138 gf100_fifo_engidx(struct gf100_fifo *fifo, u32 engn)
140 switch (engn) {
141 case NVKM_ENGINE_GR : engn = 0; break;
142 case NVKM_ENGINE_MSVLD : engn = 1; break;
143 case NVKM_ENGINE_MSPPP : engn = 2; break;
144 case NVKM_ENGINE_MSPDEC: engn = 3; break;
145 case NVKM_ENGINE_CE0 : engn = 4; break;
146 case NVKM_ENGINE_CE1 : engn = 5; break;
151 return engn;
155 gf100_fifo_engine(struct gf100_fifo *fifo, u32 engn)
180 u32 engn, engm = 0; local in function:gf100_fifo_recover_work
352 u32 engn; local in function:gf100_fifo_intr_sched_ctxsw
[all...] |
| nouveau_nvkm_engine_fifo_gk104.c | 57 gk104_fifo_engine_status(struct gk104_fifo *fifo, int engn,
60 struct nvkm_engine *engine = fifo->engine[engn].engine;
63 u32 stat = nvkm_rd32(device, 0x002640 + (engn * 0x08));
95 engn, status->busy, status->faulted,
108 if (oclass->engn == &fifo->func->chan) {
109 const struct gk104_fifo_chan_user *user = oclass->engn;
112 if (oclass->engn == &fifo->func->user) {
113 const struct gk104_fifo_user_user *user = oclass->engn;
129 oclass->engn = &fifo->func->user;
135 oclass->engn = &fifo->func->chan
287 int engn, runl; local in function:gk104_fifo_recover_work
369 unsigned long engn, engm = fifo->runlist[runl].engm; local in function:gk104_fifo_recover_chan
480 int engn; local in function:gk104_fifo_fault
588 u32 engn; local in function:gk104_fifo_intr_sched_ctxsw
896 int runl = mthd - NV_DEVICE_FIFO_RUNLIST_ENGINES(0), engn; local in function:gk104_fifo_info
921 int engn, runl, pbid, ret, i, j; local in function:gk104_fifo_oneinit
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/nouveau/include/nvkm/core/ |
| oclass.h | 24 const void *engn; member in struct:nvkm_oclass
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| /src/sys/external/bsd/drm2/dist/drm/nouveau/include/nvkm/engine/ |
| fifo.h | 41 struct nvkm_fifo_engn engn[NVKM_SUBDEV_NR]; member in struct:nvkm_fifo_chan
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