1 #ifndef __THEATRE_REGS_H__ 2 #define __THEATRE_REGS_H__ 3 4 5 #define VIPH_CH0_DATA 0x0c00 6 #define VIPH_CH1_DATA 0x0c04 7 #define VIPH_CH2_DATA 0x0c08 8 #define VIPH_CH3_DATA 0x0c0c 9 #define VIPH_CH0_ADDR 0x0c10 10 #define VIPH_CH1_ADDR 0x0c14 11 #define VIPH_CH2_ADDR 0x0c18 12 #define VIPH_CH3_ADDR 0x0c1c 13 #define VIPH_CH0_SBCNT 0x0c20 14 #define VIPH_CH1_SBCNT 0x0c24 15 #define VIPH_CH2_SBCNT 0x0c28 16 #define VIPH_CH3_SBCNT 0x0c2c 17 #define VIPH_CH0_ABCNT 0x0c30 18 #define VIPH_CH1_ABCNT 0x0c34 19 #define VIPH_CH2_ABCNT 0x0c38 20 #define VIPH_CH3_ABCNT 0x0c3c 21 #define VIPH_CONTROL 0x0c40 22 #define VIPH_DV_LAT 0x0c44 23 #define VIPH_BM_CHUNK 0x0c48 24 #define VIPH_DV_INT 0x0c4c 25 #define VIPH_TIMEOUT_STAT 0x0c50 26 27 #define VIPH_REG_DATA 0x0084 28 #define VIPH_REG_ADDR 0x0080 29 30 /* Address Space Rage Theatre Registers (VIP Access) */ 31 #define VIP_VIP_VENDOR_DEVICE_ID 0x0000 32 #define VIP_VIP_SUB_VENDOR_DEVICE_ID 0x0004 33 #define VIP_VIP_COMMAND_STATUS 0x0008 34 #define VIP_VIP_REVISION_ID 0x000c 35 #define VIP_HW_DEBUG 0x0010 36 #define VIP_SW_SCRATCH 0x0014 37 #define VIP_I2C_CNTL_0 0x0020 38 #define VIP_I2C_CNTL_1 0x0024 39 #define VIP_I2C_DATA 0x0028 40 #define VIP_INT_CNTL 0x002c 41 /* RT200 */ 42 #define VIP_INT_CNTL__FB_INT0 0x02000000 43 #define VIP_INT_CNTL__FB_INT0_CLR 0x02000000 44 #define VIP_GPIO_INOUT 0x0030 45 #define VIP_GPIO_CNTL 0x0034 46 #define VIP_CLKOUT_GPIO_CNTL 0x0038 47 #define VIP_RIPINTF_PORT_CNTL 0x003c 48 49 /* RT200 */ 50 #define VIP_GPIO_INOUT 0x0030 51 #define VIP_GPIO_CNTL 0x0034 52 #define VIP_HOSTINTF_PORT_CNTL 0x003c 53 #define VIP_HOSTINTF_PORT_CNTL__HAD_HCTL_SDA_SN 0x00000008 54 #define VIP_HOSTINTF_PORT_CNTL__HAD_HCTL_SDA_SP 0x00000080 55 #define VIP_HOSTINTF_PORT_CNTL__HAD_HCTL_SDA_SR 0x00000100 56 #define VIP_HOSTINTF_PORT_CNTL__SUB_SYS_ID_EN 0x00010000 57 #define VIP_HOSTINTF_PORT_CNTL__FIFO_RW_MODE 0x00300000 58 #define VIP_HOSTINTF_PORT_CNTL__FIFOA_ENDIAN_SWAP 0x00c00000 59 #define VIP_HOSTINTF_PORT_CNTL__FIFOB_ENDIAN_SWAP 0x03000000 60 #define VIP_HOSTINTF_PORT_CNTL__FIFOC_ENDIAN_SWAP 0x0c000000 61 #define VIP_HOSTINTF_PORT_CNTL__FIFOD_ENDIAN_SWAP 0x30000000 62 #define VIP_HOSTINTF_PORT_CNTL__FIFOE_ENDIAN_SWAP 0xc0000000 63 64 /* RT200 */ 65 #define VIP_DSP_PLL_CNTL 0x0bc 66 67 /* RT200 */ 68 #define VIP_TC_SOURCE 0x300 69 #define VIP_TC_DESTINATION 0x304 70 #define VIP_TC_COMMAND 0x308 71 72 /* RT200 */ 73 #define VIP_TC_STATUS 0x030c 74 #define VIP_TC_STATUS__TC_CHAN_BUSY 0x00007fff 75 #define VIP_TC_STATUS__TC_WRITE_PENDING 0x00008000 76 #define VIP_TC_STATUS__TC_FIFO_4_EMPTY 0x00040000 77 #define VIP_TC_STATUS__TC_FIFO_6_EMPTY 0x00080000 78 #define VIP_TC_STATUS__TC_FIFO_8_EMPTY 0x00100000 79 #define VIP_TC_STATUS__TC_FIFO_10_EMPTY 0x00200000 80 #define VIP_TC_STATUS__TC_FIFO_4_FULL 0x04000000 81 #define VIP_TC_STATUS__TC_FIFO_6_FULL 0x08080000 82 #define VIP_TC_STATUS__TC_FIFO_8_FULL 0x10080000 83 #define VIP_TC_STATUS__TC_FIFO_10_FULL 0x20080000 84 #define VIP_TC_STATUS__DSP_ILLEGAL_OP 0x80080000 85 86 /* RT200 */ 87 #define VIP_TC_DOWNLOAD 0x0310 88 #define VIP_TC_DOWNLOAD__TC_DONE_MASK 0x00003fff 89 #define VIP_TC_DOWNLOAD__TC_RESET_MODE 0x00060000 90 91 /* RT200 */ 92 #define VIP_FB_INT 0x0314 93 #define VIP_FB_INT__INT_7 0x00000080 94 #define VIP_FB_SCRATCH0 0x0318 95 #define VIP_FB_SCRATCH1 0x031c 96 97 #define VIP_ADC_CNTL 0x0400 98 #define VIP_ADC_DEBUG 0x0404 99 #define VIP_STANDARD_SELECT 0x0408 100 #define VIP_THERMO2BIN_STATUS 0x040c 101 #define VIP_COMB_CNTL0 0x0440 102 #define VIP_COMB_CNTL1 0x0444 103 #define VIP_COMB_CNTL2 0x0448 104 #define VIP_COMB_LINE_LENGTH 0x044c 105 #define VIP_NOISE_CNTL0 0x0450 106 #define VIP_HS_PLINE 0x0480 107 #define VIP_HS_DTOINC 0x0484 108 #define VIP_HS_PLLGAIN 0x0488 109 #define VIP_HS_MINMAXWIDTH 0x048c 110 #define VIP_HS_GENLOCKDELAY 0x0490 111 #define VIP_HS_WINDOW_LIMIT 0x0494 112 #define VIP_HS_WINDOW_OC_SPEED 0x0498 113 #define VIP_HS_PULSE_WIDTH 0x049c 114 #define VIP_HS_PLL_ERROR 0x04a0 115 #define VIP_HS_PLL_FS_PATH 0x04a4 116 #define VIP_SG_BLACK_GATE 0x04c0 117 #define VIP_SG_SYNCTIP_GATE 0x04c4 118 #define VIP_SG_UVGATE_GATE 0x04c8 119 #define VIP_LP_AGC_CLAMP_CNTL0 0x0500 120 #define VIP_LP_AGC_CLAMP_CNTL1 0x0504 121 #define VIP_LP_BRIGHTNESS 0x0508 122 #define VIP_LP_CONTRAST 0x050c 123 #define VIP_LP_SLICE_LIMIT 0x0510 124 #define VIP_LP_WPA_CNTL0 0x0514 125 #define VIP_LP_WPA_CNTL1 0x0518 126 #define VIP_LP_BLACK_LEVEL 0x051c 127 #define VIP_LP_SLICE_LEVEL 0x0520 128 #define VIP_LP_SYNCTIP_LEVEL 0x0524 129 #define VIP_LP_VERT_LOCKOUT 0x0528 130 #define VIP_VS_DETECTOR_CNTL 0x0540 131 #define VIP_VS_BLANKING_CNTL 0x0544 132 #define VIP_VS_FIELD_ID_CNTL 0x0548 133 #define VIP_VS_COUNTER_CNTL 0x054c 134 #define VIP_VS_FRAME_TOTAL 0x0550 135 #define VIP_VS_LINE_COUNT 0x0554 136 #define VIP_CP_PLL_CNTL0 0x0580 137 #define VIP_CP_PLL_CNTL1 0x0584 138 #define VIP_CP_HUE_CNTL 0x0588 139 #define VIP_CP_BURST_GAIN 0x058c 140 #define VIP_CP_AGC_CNTL 0x0590 141 #define VIP_CP_ACTIVE_GAIN 0x0594 142 #define VIP_CP_PLL_STATUS0 0x0598 143 #define VIP_CP_PLL_STATUS1 0x059c 144 #define VIP_CP_PLL_STATUS2 0x05a0 145 #define VIP_CP_PLL_STATUS3 0x05a4 146 #define VIP_CP_PLL_STATUS4 0x05a8 147 #define VIP_CP_PLL_STATUS5 0x05ac 148 #define VIP_CP_PLL_STATUS6 0x05b0 149 #define VIP_CP_PLL_STATUS7 0x05b4 150 #define VIP_CP_DEBUG_FORCE 0x05b8 151 #define VIP_CP_VERT_LOCKOUT 0x05bc 152 #define VIP_H_ACTIVE_WINDOW 0x05c0 153 #define VIP_V_ACTIVE_WINDOW 0x05c4 154 #define VIP_H_VBI_WINDOW 0x05c8 155 #define VIP_V_VBI_WINDOW 0x05cc 156 #define VIP_VBI_CONTROL 0x05d0 157 #define VIP_DECODER_DEBUG_CNTL 0x05d4 158 #define VIP_SINGLE_STEP_DATA 0x05d8 159 #define VIP_MASTER_CNTL 0x0040 160 #define VIP_RGB_CNTL 0x0048 161 #define VIP_CLKOUT_CNTL 0x004c 162 #define VIP_SYNC_CNTL 0x0050 163 #define VIP_I2C_CNTL 0x0054 164 #define VIP_HTOTAL 0x0080 165 #define VIP_HDISP 0x0084 166 #define VIP_HSIZE 0x0088 167 #define VIP_HSTART 0x008c 168 #define VIP_HCOUNT 0x0090 169 #define VIP_VTOTAL 0x0094 170 #define VIP_VDISP 0x0098 171 #define VIP_VCOUNT 0x009c 172 #define VIP_VFTOTAL 0x00a0 173 #define VIP_DFCOUNT 0x00a4 174 #define VIP_DFRESTART 0x00a8 175 #define VIP_DHRESTART 0x00ac 176 #define VIP_DVRESTART 0x00b0 177 #define VIP_SYNC_SIZE 0x00b4 178 #define VIP_TV_PLL_FINE_CNTL 0x00b8 179 #define VIP_CRT_PLL_FINE_CNTL 0x00bc 180 #define VIP_TV_PLL_CNTL 0x00c0 181 #define VIP_CRT_PLL_CNTL 0x00c4 182 #define VIP_PLL_CNTL0 0x00c8 183 #define VIP_PLL_TEST_CNTL 0x00cc 184 #define VIP_CLOCK_SEL_CNTL 0x00d0 185 #define VIP_VIN_PLL_CNTL 0x00d4 186 #define VIP_VIN_PLL_FINE_CNTL 0x00d8 187 #define VIP_AUD_PLL_CNTL 0x00e0 188 #define VIP_AUD_PLL_FINE_CNTL 0x00e4 189 #define VIP_AUD_CLK_DIVIDERS 0x00e8 190 #define VIP_AUD_DTO_INCREMENTS 0x00ec 191 #define VIP_L54_PLL_CNTL 0x00f0 192 #define VIP_L54_PLL_FINE_CNTL 0x00f4 193 #define VIP_L54_DTO_INCREMENTS 0x00f8 194 #define VIP_PLL_CNTL1 0x00fc 195 #define VIP_FRAME_LOCK_CNTL 0x0100 196 #define VIP_SYNC_LOCK_CNTL 0x0104 197 #define VIP_TVO_SYNC_PAT_ACCUM 0x0108 198 #define VIP_TVO_SYNC_THRESHOLD 0x010c 199 #define VIP_TVO_SYNC_PAT_EXPECT 0x0110 200 #define VIP_DELAY_ONE_MAP_A 0x0114 201 #define VIP_DELAY_ONE_MAP_B 0x0118 202 #define VIP_DELAY_ZERO_MAP_A 0x011c 203 #define VIP_DELAY_ZERO_MAP_B 0x0120 204 #define VIP_TVO_DATA_DELAY_A 0x0140 205 #define VIP_TVO_DATA_DELAY_B 0x0144 206 #define VIP_HOST_READ_DATA 0x0180 207 #define VIP_HOST_WRITE_DATA 0x0184 208 #define VIP_HOST_RD_WT_CNTL 0x0188 209 #define VIP_VSCALER_CNTL1 0x01c0 210 #define VIP_TIMING_CNTL 0x01c4 211 #define VIP_VSCALER_CNTL2 0x01c8 212 #define VIP_Y_FALL_CNTL 0x01cc 213 #define VIP_Y_RISE_CNTL 0x01d0 214 #define VIP_Y_SAW_TOOTH_CNTL 0x01d4 215 #define VIP_UPSAMP_AND_GAIN_CNTL 0x01e0 216 #define VIP_GAIN_LIMIT_SETTINGS 0x01e4 217 #define VIP_LINEAR_GAIN_SETTINGS 0x01e8 218 #define VIP_MODULATOR_CNTL1 0x0200 219 #define VIP_MODULATOR_CNTL2 0x0204 220 #define VIP_MV_MODE_CNTL 0x0208 221 #define VIP_MV_STRIPE_CNTL 0x020c 222 #define VIP_MV_LEVEL_CNTL1 0x0210 223 #define VIP_MV_LEVEL_CNTL2 0x0214 224 #define VIP_PRE_DAC_MUX_CNTL 0x0240 225 #define VIP_TV_DAC_CNTL 0x0280 226 #define VIP_CRC_CNTL 0x02c0 227 #define VIP_VIDEO_PORT_SIG 0x02c4 228 #define VIP_VBI_CC_CNTL 0x02c8 229 #define VIP_VBI_EDS_CNTL 0x02cc 230 #define VIP_VBI_20BIT_CNTL 0x02d0 231 #define VIP_VBI_DTO_CNTL 0x02d4 232 #define VIP_VBI_LEVEL_CNTL 0x02d8 233 #define VIP_UV_ADR 0x0300 234 #define VIP_MV_STATUS 0x0330 235 #define VIP_UPSAMP_COEFF0_0 0x0340 236 #define VIP_UPSAMP_COEFF0_1 0x0344 237 #define VIP_UPSAMP_COEFF0_2 0x0348 238 #define VIP_UPSAMP_COEFF1_0 0x034c 239 #define VIP_UPSAMP_COEFF1_1 0x0350 240 #define VIP_UPSAMP_COEFF1_2 0x0354 241 #define VIP_UPSAMP_COEFF2_0 0x0358 242 #define VIP_UPSAMP_COEFF2_1 0x035c 243 #define VIP_UPSAMP_COEFF2_2 0x0360 244 #define VIP_UPSAMP_COEFF3_0 0x0364 245 #define VIP_UPSAMP_COEFF3_1 0x0368 246 #define VIP_UPSAMP_COEFF3_2 0x036c 247 #define VIP_UPSAMP_COEFF4_0 0x0370 248 #define VIP_UPSAMP_COEFF4_1 0x0374 249 #define VIP_UPSAMP_COEFF4_2 0x0378 250 #define VIP_TV_DTO_INCREMENTS 0x0390 251 #define VIP_CRT_DTO_INCREMENTS 0x0394 252 #define VIP_VSYNC_DIFF_CNTL 0x03a0 253 #define VIP_VSYNC_DIFF_LIMITS 0x03a4 254 #define VIP_VSYNC_DIFF_RD_DATA 0x03a8 255 #define VIP_SCALER_IN_WINDOW 0x0618 256 #define VIP_SCALER_OUT_WINDOW 0x061c 257 #define VIP_H_SCALER_CONTROL 0x0600 258 #define VIP_V_SCALER_CONTROL 0x0604 259 #define VIP_V_DEINTERLACE_CONTROL 0x0608 260 #define VIP_VBI_SCALER_CONTROL 0x060c 261 #define VIP_DVS_PORT_CTRL 0x0610 262 #define VIP_DVS_PORT_READBACK 0x0614 263 #define VIP_FIFOA_CONFIG 0x0800 264 #define VIP_FIFOB_CONFIG 0x0804 265 #define VIP_FIFOC_CONFIG 0x0808 266 #define VIP_SPDIF_PORT_CNTL 0x080c 267 #define VIP_SPDIF_CHANNEL_STAT 0x0810 268 #define VIP_SPDIF_AC3_PREAMBLE 0x0814 269 #define VIP_I2S_TRANSMIT_CNTL 0x0818 270 #define VIP_I2S_RECEIVE_CNTL 0x081c 271 #define VIP_SPDIF_TX_CNT_REG 0x0820 272 #define VIP_IIS_TX_CNT_REG 0x0824 273 274 /* Status defines */ 275 #define VIP_BUSY 0 276 #define VIP_IDLE 1 277 #define VIP_RESET 2 278 279 #define VIPH_TIMEOUT_STAT__VIPH_FIFO0_STAT 0x00000001 280 #define VIPH_TIMEOUT_STAT__VIPH_FIFO0_AK 0x00000001 281 #define VIPH_TIMEOUT_STAT__VIPH_FIFO1_STAT 0x00000002 282 #define VIPH_TIMEOUT_STAT__VIPH_FIFO1_AK 0x00000002 283 #define VIPH_TIMEOUT_STAT__VIPH_FIFO2_STAT 0x00000004 284 #define VIPH_TIMEOUT_STAT__VIPH_FIFO2_AK 0x00000004 285 #define VIPH_TIMEOUT_STAT__VIPH_FIFO3_STAT 0x00000008 286 #define VIPH_TIMEOUT_STAT__VIPH_FIFO3_AK 0x00000008 287 288 #define VIPH_TIMEOUT_STAT__VIPH_REG_STAT 0x00000010 289 #define VIPH_TIMEOUT_STAT__VIPH_REG_AK 0x00000010 290 #define VIPH_TIMEOUT_STAT__VIPH_REGR_DIS 0x01000000 291 #define TEST_DEBUG_CNTL__TEST_DEBUG_OUT_EN 0x00000001 292 293 #define RT100_ATI_ID 0x4D541002 294 #define RT200_ATI_ID 0x4d4a1002 295 296 /* Register/Field values: */ 297 #define RT_COMP0 0x0 298 #define RT_COMP1 0x1 299 #define RT_COMP2 0x2 300 #define RT_YF_COMP3 0x3 301 #define RT_YR_COMP3 0x4 302 #define RT_YCF_COMP4 0x5 303 #define RT_YCR_COMP4 0x6 304 305 /* Video standard defines */ 306 #define RT_NTSC 0x0 307 #define RT_PAL 0x1 308 #define RT_SECAM 0x2 309 #define extNONE 0x0000 310 #define extNTSC 0x0100 311 #define extRsvd 0x0200 312 #define extPAL 0x0300 313 #define extPAL_M 0x0400 314 #define extPAL_N 0x0500 315 #define extSECAM 0x0600 316 #define extPAL_NCOMB 0x0700 317 #define extNTSC_J 0x0800 318 #define extNTSC_443 0x0900 319 #define extPAL_BGHI 0x0A00 320 #define extPAL_60 0x0B00 321 /* these are used in MSP3430 */ 322 #define extPAL_DK1 0x0C00 323 #define extPAL_AUTO 0x0D00 324 /* these are used in RT200. Some are defined above */ 325 #define extPAL_B 0x0E00 326 #define extPAL_D 0x0F00 327 #define extPAL_G 0x1000 328 #define extPAL_H 0x1100 329 #define extPAL_I 0x1200 330 #define extSECAM_B 0x1300 331 #define extSECAM_D 0x1400 332 #define extSECAM_G 0x1500 333 #define extSECAM_H 0x1600 334 #define extSECAM_K 0x1700 335 #define extSECAM_K1 0x1800 336 #define extSECAM_L 0x1900 337 #define extSECAM_L1 0x1A00 338 339 #define RT_FREF_2700 6 340 #define RT_FREF_2950 5 341 342 #define RT_COMPOSITE 0x0 343 #define RT_SVIDEO 0x1 344 345 #define RT_NORM_SHARPNESS 0x03 346 #define RT_HIGH_SHARPNESS 0x0F 347 348 #define RT_HUE_PAL_DEF 0x00 349 350 #define RT_DECINTERLACED 0x1 351 #define RT_DECNONINTERLACED 0x0 352 353 #define NTSC_LINES 525 354 #define PAL_SECAM_LINES 625 355 356 #define RT_ASYNC_ENABLE 0x0 357 #define RT_ASYNC_DISABLE 0x1 358 #define RT_ASYNC_RESET 0x1 359 360 #define RT_VINRST_ACTIVE 0x0 361 #define RT_VINRST_RESET 0x1 362 #define RT_L54RST_RESET 0x1 363 364 #define RT_REF_CLK 0x0 365 #define RT_PLL_VIN_CLK 0x1 366 367 #define RT_VIN_ASYNC_RST 0x20 368 #define RT_DVS_ASYNC_RST 0x80 369 370 #define RT_ADC_ENABLE 0x0 371 #define RT_ADC_DISABLE 0x1 372 373 #define RT_DVSDIR_IN 0x0 374 #define RT_DVSDIR_OUT 0x1 375 376 #define RT_DVSCLK_HIGH 0x0 377 #define RT_DVSCLK_LOW 0x1 378 379 #define RT_DVSCLK_SEL_8FS 0x0 380 #define RT_DVSCLK_SEL_27MHZ 0x1 381 382 #define RT_DVS_CONTSTREAM 0x1 383 #define RT_DVS_NONCONTSTREAM 0x0 384 385 #define RT_DVSDAT_HIGH 0x0 386 #define RT_DVSDAT_LOW 0x1 387 388 #define RT_ADC_CNTL_DEFAULT 0x03252338 389 390 /* COMB_CNTL0 FILTER SETTINGS FOR DIFFERENT STANDARDS: */ 391 #define RT_NTSCM_COMB_CNTL0_COMPOSITE 0x09438090 /* was 0x09438090 */ 392 #define RT_NTSCM_COMB_CNTL0_SVIDEO 0x48540000 393 394 #define RT_PAL_COMB_CNTL0_COMPOSITE 0x09438090 395 #define RT_PAL_COMB_CNTL0_SVIDEO 0x40348090 396 397 #define RT_SECAM_COMB_CNTL0_COMPOSITE 0xD0108090 /* instead of orig 0xD0088090 - eric*/ 398 #define RT_SECAM_COMB_CNTL0_SVIDEO 0x50148090 399 400 #define RT_PALN_COMB_CNTL0_COMPOSITE 0x09438090 401 #define RT_PALN_COMB_CNTL0_SVIDEO 0x40348090 402 403 #define RT_PALM_COMB_CNTL0_COMPOSITE 0x09438090 404 #define RT_PALM_COMB_CNTL0_SVIDEO 0x40348090 405 /* End of filter settings. */ 406 407 /* COMB_CNTL1 FILTER SETTINGS FOR DIFFERENT STANDARDS: */ 408 #define RT_NTSCM_COMB_CNTL1_COMPOSITE 0x00000010 409 #define RT_NTSCM_COMB_CNTL1_SVIDEO 0x00000081 410 411 #define RT_PAL_COMB_CNTL1_COMPOSITE 0x00000010 412 #define RT_PAL_COMB_CNTL1_SVIDEO 0x000000A1 413 414 #define RT_SECAM_COMB_CNTL1_COMPOSITE 0x00000091 415 #define RT_SECAM_COMB_CNTL1_SVIDEO 0x00000081 416 417 #define RT_PALN_COMB_CNTL1_COMPOSITE 0x00000010 418 #define RT_PALN_COMB_CNTL1_SVIDEO 0x000000A1 419 420 #define RT_PALM_COMB_CNTL1_COMPOSITE 0x00000010 421 #define RT_PALM_COMB_CNTL1_SVIDEO 0x000000A1 422 /* End of filter settings. */ 423 424 /* COMB_CNTL2 FILTER SETTINGS FOR DIFFERENT STANDARDS: */ 425 #define RT_NTSCM_COMB_CNTL2_COMPOSITE 0x16161010 426 #define RT_NTSCM_COMB_CNTL2_SVIDEO 0xFFFFFFFF 427 428 #define RT_PAL_COMB_CNTL2_COMPOSITE 0x06080102 /* instead of 0x16161010 - Ivo */ 429 #define RT_PAL_COMB_CNTL2_SVIDEO 0x06080102 430 431 #define RT_SECAM_COMB_CNTL2_COMPOSITE 0xffffffff /* instead of 0x06080102 - eric */ 432 #define RT_SECAM_COMB_CNTL2_SVIDEO 0x06080102 433 434 #define RT_PALN_COMB_CNTL2_COMPOSITE 0x06080102 435 #define RT_PALN_COMB_CNTL2_SVIDEO 0x06080102 436 437 #define RT_PALM_COMB_CNTL2_COMPOSITE 0x06080102 438 #define RT_PALM_COMB_CNTL2_SVIDEO 0x06080102 439 /* End of filter settings. */ 440 441 /* COMB_LINE_LENGTH FILTER SETTINGS FOR DIFFERENT STANDARDS: */ 442 #define RT_NTSCM_COMB_LENGTH_COMPOSITE 0x0718038A 443 #define RT_NTSCM_COMB_LENGTH_SVIDEO 0x0718038A 444 445 #define RT_PAL_COMB_LENGTH_COMPOSITE 0x08DA046B 446 #define RT_PAL_COMB_LENGTH_SVIDEO 0x08DA046B 447 448 #define RT_SECAM_COMB_LENGTH_COMPOSITE 0x08DA046A 449 #define RT_SECAM_COMB_LENGTH_SVIDEO 0x08DA046A 450 451 #define RT_PALN_COMB_LENGTH_COMPOSITE 0x07260391 452 #define RT_PALN_COMB_LENGTH_SVIDEO 0x07260391 453 454 #define RT_PALM_COMB_LENGTH_COMPOSITE 0x07160389 455 #define RT_PALM_COMB_LENGTH_SVIDEO 0x07160389 456 /* End of filter settings. */ 457 458 /* LP_AGC_CLAMP_CNTL0 */ 459 #define RT_NTSCM_SYNCTIP_REF0 0x00000037 460 #define RT_NTSCM_SYNCTIP_REF1 0x00000029 461 #define RT_NTSCM_CLAMP_REF 0x0000003B 462 #define RT_NTSCM_PEAKWHITE 0x000000FF 463 #define RT_NTSCM_VBI_PEAKWHITE 0x000000D2 /* was 0xc2 - docs say d2 */ 464 465 #define RT_NTSCM_WPA_THRESHOLD 0x00000406 466 #define RT_NTSCM_WPA_TRIGGER_LO 0x000000B3 467 468 #define RT_NTSCM_WPA_TRIGGER_HIGH 0x0000021B 469 470 #define RT_NTSCM_LP_LOCKOUT_START 0x00000206 471 #define RT_NTSCM_LP_LOCKOUT_END 0x00000021 472 #define RT_NTSCM_CH_DTO_INC 0x00400000 473 #define RT_NTSCM_CH_PLL_SGAIN 0x00000001 474 #define RT_NTSCM_CH_PLL_FGAIN 0x00000002 475 476 #define RT_NTSCM_CR_BURST_GAIN 0x0000007A 477 #define RT_NTSCM_CB_BURST_GAIN 0x000000AC 478 479 #define RT_NTSCM_CH_HEIGHT 0x000000CD 480 #define RT_NTSCM_CH_KILL_LEVEL 0x000000C0 481 #define RT_NTSCM_CH_AGC_ERROR_LIM 0x00000002 482 #define RT_NTSCM_CH_AGC_FILTER_EN 0x00000000 483 #define RT_NTSCM_CH_AGC_LOOP_SPEED 0x00000000 484 485 #define RT_NTSCM_CRDR_ACTIVE_GAIN 0x0000007A 486 #define RT_NTSCM_CBDB_ACTIVE_GAIN 0x000000AC 487 488 #define RT_NTSCM_VERT_LOCKOUT_START 0x00000207 489 #define RT_NTSCM_VERT_LOCKOUT_END 0x0000000E 490 491 #define RT_NTSCJ_SYNCTIP_REF0 0x00000004 492 #define RT_NTSCJ_SYNCTIP_REF1 0x00000012 493 #define RT_NTSCJ_CLAMP_REF 0x0000003B 494 #define RT_NTSCJ_PEAKWHITE 0x000000CB 495 #define RT_NTSCJ_VBI_PEAKWHITE 0x000000C2 496 #define RT_NTSCJ_WPA_THRESHOLD 0x000004B0 497 #define RT_NTSCJ_WPA_TRIGGER_LO 0x000000B4 498 #define RT_NTSCJ_WPA_TRIGGER_HIGH 0x0000021C 499 #define RT_NTSCJ_LP_LOCKOUT_START 0x00000206 500 #define RT_NTSCJ_LP_LOCKOUT_END 0x00000021 501 502 #define RT_NTSCJ_CR_BURST_GAIN 0x00000071 503 #define RT_NTSCJ_CB_BURST_GAIN 0x0000009F 504 #define RT_NTSCJ_CH_HEIGHT 0x000000CD 505 #define RT_NTSCJ_CH_KILL_LEVEL 0x000000C0 506 #define RT_NTSCJ_CH_AGC_ERROR_LIM 0x00000002 507 #define RT_NTSCJ_CH_AGC_FILTER_EN 0x00000000 508 #define RT_NTSCJ_CH_AGC_LOOP_SPEED 0x00000000 509 510 #define RT_NTSCJ_CRDR_ACTIVE_GAIN 0x00000071 511 #define RT_NTSCJ_CBDB_ACTIVE_GAIN 0x0000009F 512 #define RT_NTSCJ_VERT_LOCKOUT_START 0x00000207 513 #define RT_NTSCJ_VERT_LOCKOUT_END 0x0000000E 514 515 #define RT_PAL_SYNCTIP_REF0 0x37 /* instead of 0x00000004 - Ivo */ 516 #define RT_PAL_SYNCTIP_REF1 0x26 /* instead of 0x0000000F - Ivo */ 517 #define RT_PAL_CLAMP_REF 0x0000003B 518 #define RT_PAL_PEAKWHITE 0xFF /* instead of 0x000000C1 - Ivo */ 519 #define RT_PAL_VBI_PEAKWHITE 0xC6 /* instead of 0x000000C7 - Ivo */ 520 #define RT_PAL_WPA_THRESHOLD 0x59C /* instead of 0x000006A4 - Ivo */ 521 522 #define RT_PAL_WPA_TRIGGER_LO 0x00000096 523 #define RT_PAL_WPA_TRIGGER_HIGH 0x000001C2 524 #define RT_PAL_LP_LOCKOUT_START 0x00000263 525 #define RT_PAL_LP_LOCKOUT_END 0x0000002C 526 527 #define RT_PAL_CH_DTO_INC 0x00400000 528 #define RT_PAL_CH_PLL_SGAIN 1 /* instead of 0x00000002 - Ivo */ 529 #define RT_PAL_CH_PLL_FGAIN 2 /* instead of 0x00000001 - Ivo */ 530 #define RT_PAL_CR_BURST_GAIN 0x0000007A 531 #define RT_PAL_CB_BURST_GAIN 0x000000AB 532 #define RT_PAL_CH_HEIGHT 0x0000009C 533 #define RT_PAL_CH_KILL_LEVEL 4 /* instead of 0x00000090 - Ivo */ 534 #define RT_PAL_CH_AGC_ERROR_LIM 1 /* instead of 0x00000002 - Ivo */ 535 #define RT_PAL_CH_AGC_FILTER_EN 1 /* instead of 0x00000000 - Ivo */ 536 #define RT_PAL_CH_AGC_LOOP_SPEED 0x00000000 537 538 #define RT_PAL_CRDR_ACTIVE_GAIN 0x9E /* instead of 0x0000007A - Ivo */ 539 #define RT_PAL_CBDB_ACTIVE_GAIN 0xDF /* instead of 0x000000AB - Ivo */ 540 #define RT_PAL_VERT_LOCKOUT_START 0x00000269 541 #define RT_PAL_VERT_LOCKOUT_END 0x00000012 542 543 #define RT_SECAM_SYNCTIP_REF0 0x37 /* instead of 0x00000004 - Ivo */ 544 #define RT_SECAM_SYNCTIP_REF1 0x26 /* instead of 0x0000000F - Ivo */ 545 #define RT_SECAM_CLAMP_REF 0x0000003B 546 #define RT_SECAM_PEAKWHITE 0xFF /* instead of 0x000000C1 - Ivo */ 547 #define RT_SECAM_VBI_PEAKWHITE 0xC6 /* instead of 0x000000C7 - Ivo */ 548 #define RT_SECAM_WPA_THRESHOLD 0x57A /* instead of 0x6A4, instead of 0x0000059C is Ivo's value , -eric*/ 549 550 #define RT_SECAM_WPA_TRIGGER_LO 0x96 /* instead of 0x0000026B - eric */ 551 #define RT_SECAM_WPA_TRIGGER_HIGH 0x000001C2 552 #define RT_SECAM_LP_LOCKOUT_START 0x263 /* instead of 0x0000026B - eric */ 553 #define RT_SECAM_LP_LOCKOUT_END 0x2b /* instead of 0x0000002C -eric */ 554 555 #define RT_SECAM_CH_DTO_INC 0x003E7A28 556 #define RT_SECAM_CH_PLL_SGAIN 0x4 /* instead of 0x00000006 - Volodya */ 557 #define RT_SECAM_CH_PLL_FGAIN 0x7 /* instead of 0x00000006 -Volodya */ 558 559 #define RT_SECAM_CR_BURST_GAIN 0x1FF /* instead of 0x00000200 -Volodya */ 560 #define RT_SECAM_CB_BURST_GAIN 0x1FF /* instead of 0x00000200 -Volodya */ 561 #define RT_SECAM_CH_HEIGHT 0x00000066 562 #define RT_SECAM_CH_KILL_LEVEL 0x00000060 563 #define RT_SECAM_CH_AGC_ERROR_LIM 0x00000003 564 #define RT_SECAM_CH_AGC_FILTER_EN 0x00000000 565 #define RT_SECAM_CH_AGC_LOOP_SPEED 0x00000000 566 567 #define RT_SECAM_CRDR_ACTIVE_GAIN 0x11B /* instead of 0x00000200 - eric */ 568 #define RT_SECAM_CBDB_ACTIVE_GAIN 0x15A /* instead of 0x00000200 - eric */ 569 #define RT_SECAM_VERT_LOCKOUT_START 0x00000269 570 #define RT_SECAM_VERT_LOCKOUT_END 0x00000012 571 572 #define RT_PAL_VS_FIELD_BLANK_END 0x2A /* instead of 0x0000002C - Ivo*/ 573 #define RT_NTSCM_VS_FIELD_BLANK_END 0x0000000a 574 575 #define RT_NTSCM_FIELD_IDLOCATION 0x00000105 576 #define RT_PAL_FIELD_IDLOCATION 0x00000137 577 578 #define RT_NTSCM_H_ACTIVE_START 0x00000070 579 #define RT_NTSCM_H_ACTIVE_END 0x00000363 580 581 #define RT_PAL_H_ACTIVE_START 0x0000009A 582 #define RT_PAL_H_ACTIVE_END 0x00000439 583 584 #define RT_NTSCM_V_ACTIVE_START ((22-4)*2+1) 585 #define RT_NTSCM_V_ACTIVE_END ((22+240-4)*2+1) 586 587 #define RT_PAL_V_ACTIVE_START 0x2E /* instead of 0x00000023 (Same as SECAM) - Ivo */ 588 #define RT_PAL_V_ACTIVE_END 0x269 /* instead of 0x00000262 - Ivo */ 589 590 /* VBI */ 591 #define RT_NTSCM_H_VBI_WIND_START 0x32 /* instead of 0x00000049 - V.D. */ 592 #define RT_NTSCM_H_VBI_WIND_END 0x367 /* instead of 0x00000366 - V.D. */ 593 594 #define RT_PAL_H_VBI_WIND_START 0x00000084 595 #define RT_PAL_H_VBI_WIND_END 0x0000041F 596 597 #define RT_NTSCM_V_VBI_WIND_START fld_V_VBI_WIND_START_def 598 #define RT_NTSCM_V_VBI_WIND_END fld_V_VBI_WIND_END_def 599 600 #define RT_PAL_V_VBI_WIND_START 0x8 /* instead of 0x0000000B - Ivo */ 601 #define RT_PAL_V_VBI_WIND_END 0x2D /* instead of 0x00000022 - Ivo */ 602 603 #define RT_VBI_CAPTURE_EN 0x00000001 /* Enable */ 604 #define RT_VBI_CAPTURE_DIS 0x00000000 /* Disable */ 605 #define RT_RAW_CAPTURE 0x00000002 /* Use raw Video Capture. */ 606 607 #define RT_NTSCM_VSYNC_INT_TRIGGER 0x2AA 608 #define RT_PALSEM_VSYNC_INT_TRIGGER 0x353 609 610 #define RT_NTSCM_VSYNC_INT_HOLD 0x17 611 #define RT_PALSEM_VSYNC_INT_HOLD 0x1C 612 613 #define RT_NTSCM_VS_FIELD_BLANK_START 0x206 614 #define RT_PALSEM_VS_FIELD_BLANK_START 0x26D /* instead of 0x26C - Ivo */ 615 616 #define RT_FIELD_FLIP_EN 0x4 617 #define RT_V_FIELD_FLIP_INVERTED 0x2000 618 619 #define RT_NTSCM_H_IN_START 0x70 620 #define RT_PAL_H_IN_START 154 /* instead of 144 - Ivo */ 621 #define RT_SECAM_H_IN_START 0x91 /* instead of 0x9A, Ivo value is 154, instead of 144 - Volodya, - eric */ 622 #define RT_NTSC_H_ACTIVE_SIZE 744 623 #define RT_PAL_H_ACTIVE_SIZE 928 /* instead of 927 - Ivo */ 624 #define RT_SECAM_H_ACTIVE_SIZE 932 /* instead of 928, instead of 927 - Ivo, - eric */ 625 #define RT_NTSCM_V_IN_START (0x23) 626 #define RT_PAL_V_IN_START 44 /* instead of (45-6) - Ivo */ 627 #define RT_SECAM_V_IN_START 0x2C /* instead of (45-6) - Volodya */ 628 #define RT_NTSCM_V_ACTIVE_SIZE 480 629 #define RT_PAL_V_ACTIVE_SIZE 572 /* instead of 575 - Ivo */ 630 #define RT_SECAM_V_ACTIVE_SIZE 570 /* instead of 572, instead of 575 - Ivo, - eric */ 631 632 #define RT_NTSCM_WIN_CLOSE_LIMIT 0x4D 633 #define RT_NTSCJ_WIN_CLOSE_LIMIT 0x4D 634 #define RT_NTSC443_WIN_CLOSE_LIMIT 0x5F 635 #define RT_PALM_WIN_CLOSE_LIMIT 0x4D 636 #define RT_PALN_WIN_CLOSE_LIMIT 0x5F 637 #define RT_SECAM_WIN_CLOSE_LIMIT 0xC7 /* instead of 0x5F - eric */ 638 639 #define RT_NTSCM_VS_FIELD_BLANK_START 0x206 640 641 #define RT_NTSCM_HS_PLL_SGAIN 0x5 642 #define RT_NTSCM_HS_PLL_FGAIN 0x7 643 644 #define RT_NTSCM_H_OUT_WIND_WIDTH 0x2F4 645 #define RT_NTSCM_V_OUT_WIND_HEIGHT 0xF0 646 647 #define TV 0x1 648 #define LINEIN 0x2 649 #define MUTE 0x3 650 651 #define DEC_COMPOSITE 0 652 #define DEC_SVIDEO 1 653 #define DEC_TUNER 2 654 655 #define DEC_NTSC 0 656 #define DEC_PAL 1 657 #define DEC_SECAM 2 658 #define DEC_NTSC_J 8 659 660 #define DEC_SMOOTH 0 661 #define DEC_SHARP 1 662 663 /* RT Register Field Defaults: */ 664 #define fld_tmpReg1_def (uint32_t) 0x00000000 665 #define fld_tmpReg2_def (uint32_t) 0x00000001 666 #define fld_tmpReg3_def (uint32_t) 0x00000002 667 668 #define fld_LP_CONTRAST_def (uint32_t) 0x0000006e 669 #define fld_LP_BRIGHTNESS_def (uint32_t) 0x00003ff0 670 #define fld_CP_HUE_CNTL_def (uint32_t) 0x00000000 671 #define fld_LUMA_FILTER_def (uint32_t) 0x00000001 672 #define fld_H_SCALE_RATIO_def (uint32_t) 0x00010000 673 #define fld_H_SHARPNESS_def (uint32_t) 0x00000000 674 675 #define fld_V_SCALE_RATIO_def (uint32_t) 0x00000800 676 #define fld_V_DEINTERLACE_ON_def (uint32_t) 0x00000001 677 #define fld_V_BYPSS_def (uint32_t) 0x00000000 678 #define fld_V_DITHER_ON_def (uint32_t) 0x00000001 679 #define fld_EVENF_OFFSET_def (uint32_t) 0x00000000 680 #define fld_ODDF_OFFSET_def (uint32_t) 0x00000000 681 682 #define fld_INTERLACE_DETECTED_def (uint32_t) 0x00000000 683 684 #define fld_VS_LINE_COUNT_def (uint32_t) 0x00000000 685 #define fld_VS_DETECTED_LINES_def (uint32_t) 0x00000000 686 #define fld_VS_ITU656_VB_def (uint32_t) 0x00000000 687 688 #define fld_VBI_CC_DATA_def (uint32_t) 0x00000000 689 #define fld_VBI_CC_WT_def (uint32_t) 0x00000000 690 #define fld_VBI_CC_WT_ACK_def (uint32_t) 0x00000000 691 #define fld_VBI_CC_HOLD_def (uint32_t) 0x00000000 692 #define fld_VBI_DECODE_EN_def (uint32_t) 0x00000000 693 694 #define fld_VBI_CC_DTO_P_def (uint32_t) 0x00001802 695 #define fld_VBI_20BIT_DTO_P_def (uint32_t) 0x0000155c 696 697 #define fld_VBI_CC_LEVEL_def (uint32_t) 0x0000003f 698 #define fld_VBI_20BIT_LEVEL_def (uint32_t) 0x00000059 699 #define fld_VBI_CLK_RUNIN_GAIN_def (uint32_t) 0x0000010f 700 701 #define fld_H_VBI_WIND_START_def (uint32_t) 0x00000041 702 #define fld_H_VBI_WIND_END_def (uint32_t) 0x00000366 703 704 #define fld_V_VBI_WIND_START_def (uint32_t) 0x0B /* instead of 0x0D - V.D. */ 705 #define fld_V_VBI_WIND_END_def (uint32_t) 0x24 706 707 #define fld_VBI_20BIT_DATA0_def (uint32_t) 0x00000000 708 #define fld_VBI_20BIT_DATA1_def (uint32_t) 0x00000000 709 #define fld_VBI_20BIT_WT_def (uint32_t) 0x00000000 710 #define fld_VBI_20BIT_WT_ACK_def (uint32_t) 0x00000000 711 #define fld_VBI_20BIT_HOLD_def (uint32_t) 0x00000000 712 713 #define fld_VBI_CAPTURE_ENABLE_def (uint32_t) 0x00000000 714 715 #define fld_VBI_EDS_DATA_def (uint32_t) 0x00000000 716 #define fld_VBI_EDS_WT_def (uint32_t) 0x00000000 717 #define fld_VBI_EDS_WT_ACK_def (uint32_t) 0x00000000 718 #define fld_VBI_EDS_HOLD_def (uint32_t) 0x00000000 719 720 #define fld_VBI_SCALING_RATIO_def (uint32_t) 0x00010000 721 #define fld_VBI_ALIGNER_ENABLE_def (uint32_t) 0x00000000 722 723 #define fld_H_ACTIVE_START_def (uint32_t) 0x00000070 724 #define fld_H_ACTIVE_END_def (uint32_t) 0x000002f0 725 726 #define fld_V_ACTIVE_START_def (uint32_t) ((22-4)*2+1) 727 #define fld_V_ACTIVE_END_def (uint32_t) ((22+240-4)*2+2) 728 729 #define fld_CH_HEIGHT_def (uint32_t) 0x000000CD 730 #define fld_CH_KILL_LEVEL_def (uint32_t) 0x000000C0 731 #define fld_CH_AGC_ERROR_LIM_def (uint32_t) 0x00000002 732 #define fld_CH_AGC_FILTER_EN_def (uint32_t) 0x00000000 733 #define fld_CH_AGC_LOOP_SPEED_def (uint32_t) 0x00000000 734 735 #define fld_HUE_ADJ_def (uint32_t) 0x00000000 736 737 #define fld_STANDARD_SEL_def (uint32_t) 0x00000000 738 #define fld_STANDARD_YC_def (uint32_t) 0x00000000 739 740 #define fld_ADC_PDWN_def (uint32_t) 0x00000001 741 #define fld_INPUT_SELECT_def (uint32_t) 0x00000000 742 743 #define fld_ADC_PREFLO_def (uint32_t) 0x00000003 744 #define fld_H_SYNC_PULSE_WIDTH_def (uint32_t) 0x00000000 745 #define fld_HS_GENLOCKED_def (uint32_t) 0x00000000 746 #define fld_HS_SYNC_IN_WIN_def (uint32_t) 0x00000000 747 748 #define fld_VIN_ASYNC_RST_def (uint32_t) 0x00000001 749 #define fld_DVS_ASYNC_RST_def (uint32_t) 0x00000001 750 751 /* Vendor IDs: */ 752 #define fld_VIP_VENDOR_ID_def (uint32_t) 0x00001002 753 #define fld_VIP_DEVICE_ID_def (uint32_t) 0x00004d54 754 #define fld_VIP_REVISION_ID_def (uint32_t) 0x00000001 755 756 /* AGC Delay Register */ 757 #define fld_BLACK_INT_START_def (uint32_t) 0x00000031 758 #define fld_BLACK_INT_LENGTH_def (uint32_t) 0x0000000f 759 760 #define fld_UV_INT_START_def (uint32_t) 0x0000003b 761 #define fld_U_INT_LENGTH_def (uint32_t) 0x0000000f 762 #define fld_V_INT_LENGTH_def (uint32_t) 0x0000000f 763 #define fld_CRDR_ACTIVE_GAIN_def (uint32_t) 0x0000007a 764 #define fld_CBDB_ACTIVE_GAIN_def (uint32_t) 0x000000ac 765 766 #define fld_DVS_DIRECTION_def (uint32_t) 0x00000000 767 #define fld_DVS_VBI_UINT8_SWAP_def (uint32_t) 0x00000000 768 #define fld_DVS_CLK_SELECT_def (uint32_t) 0x00000000 769 #define fld_CONTINUOUS_STREAM_def (uint32_t) 0x00000000 770 #define fld_DVSOUT_CLK_DRV_def (uint32_t) 0x00000001 771 #define fld_DVSOUT_DATA_DRV_def (uint32_t) 0x00000001 772 773 #define fld_COMB_CNTL0_def (uint32_t) 0x09438090 774 #define fld_COMB_CNTL1_def (uint32_t) 0x00000010 775 776 #define fld_COMB_CNTL2_def (uint32_t) 0x16161010 777 #define fld_COMB_LENGTH_def (uint32_t) 0x0718038A 778 779 #define fld_SYNCTIP_REF0_def (uint32_t) 0x00000037 780 #define fld_SYNCTIP_REF1_def (uint32_t) 0x00000029 781 #define fld_CLAMP_REF_def (uint32_t) 0x0000003B 782 #define fld_AGC_PEAKWHITE_def (uint32_t) 0x000000FF 783 #define fld_VBI_PEAKWHITE_def (uint32_t) 0x000000D2 784 785 #define fld_WPA_THRESHOLD_def (uint32_t) 0x000003B0 786 787 #define fld_WPA_TRIGGER_LO_def (uint32_t) 0x000000B4 788 #define fld_WPA_TRIGGER_HIGH_def (uint32_t) 0x0000021C 789 790 #define fld_LOCKOUT_START_def (uint32_t) 0x00000206 791 #define fld_LOCKOUT_END_def (uint32_t) 0x00000021 792 793 #define fld_CH_DTO_INC_def (uint32_t) 0x00400000 794 #define fld_PLL_SGAIN_def (uint32_t) 0x00000001 795 #define fld_PLL_FGAIN_def (uint32_t) 0x00000002 796 797 #define fld_CR_BURST_GAIN_def (uint32_t) 0x0000007a 798 #define fld_CB_BURST_GAIN_def (uint32_t) 0x000000ac 799 800 #define fld_VERT_LOCKOUT_START_def (uint32_t) 0x00000207 801 #define fld_VERT_LOCKOUT_END_def (uint32_t) 0x0000000E 802 803 #define fld_H_IN_WIND_START_def (uint32_t) 0x00000070 804 #define fld_V_IN_WIND_START_def (uint32_t) 0x00000027 805 806 #define fld_H_OUT_WIND_WIDTH_def (uint32_t) 0x000002f4 807 808 #define fld_V_OUT_WIND_WIDTH_def (uint32_t) 0x000000f0 809 810 #define fld_HS_LINE_TOTAL_def (uint32_t) 0x0000038E 811 812 #define fld_MIN_PULSE_WIDTH_def (uint32_t) 0x0000002F 813 #define fld_MAX_PULSE_WIDTH_def (uint32_t) 0x00000046 814 815 #define fld_WIN_CLOSE_LIMIT_def (uint32_t) 0x0000004D 816 #define fld_WIN_OPEN_LIMIT_def (uint32_t) 0x000001B7 817 818 #define fld_VSYNC_INT_TRIGGER_def (uint32_t) 0x000002AA 819 820 #define fld_VSYNC_INT_HOLD_def (uint32_t) 0x0000001D 821 822 #define fld_VIN_M0_def (uint32_t) 0x00000039 823 #define fld_VIN_N0_def (uint32_t) 0x0000014c 824 #define fld_MNFLIP_EN_def (uint32_t) 0x00000000 825 #define fld_VIN_P_def (uint32_t) 0x00000006 826 #define fld_REG_CLK_SEL_def (uint32_t) 0x00000000 827 828 #define fld_VIN_M1_def (uint32_t) 0x00000000 829 #define fld_VIN_N1_def (uint32_t) 0x00000000 830 #define fld_VIN_DRIVER_SEL_def (uint32_t) 0x00000000 831 #define fld_VIN_MNFLIP_REQ_def (uint32_t) 0x00000000 832 #define fld_VIN_MNFLIP_DONE_def (uint32_t) 0x00000000 833 #define fld_TV_LOCK_TO_VIN_def (uint32_t) 0x00000000 834 #define fld_TV_P_FOR_WINCLK_def (uint32_t) 0x00000004 835 836 #define fld_VINRST_def (uint32_t) 0x00000001 837 #define fld_VIN_CLK_SEL_def (uint32_t) 0x00000000 838 839 #define fld_VS_FIELD_BLANK_START_def (uint32_t) 0x00000206 840 841 #define fld_VS_FIELD_BLANK_END_def (uint32_t) 0x0000000A 842 843 /*#define fld_VS_FIELD_IDLOCATION_def (uint32_t) 0x00000105 */ 844 #define fld_VS_FIELD_IDLOCATION_def (uint32_t) 0x00000001 845 #define fld_VS_FRAME_TOTAL_def (uint32_t) 0x00000217 846 847 #define fld_SYNC_TIP_START_def (uint32_t) 0x00000372 848 #define fld_SYNC_TIP_LENGTH_def (uint32_t) 0x0000000F 849 850 #define fld_GAIN_FORCE_DATA_def (uint32_t) 0x00000000 851 #define fld_GAIN_FORCE_EN_def (uint32_t) 0x00000000 852 #define fld_I_CLAMP_SEL_def (uint32_t) 0x00000003 853 #define fld_I_AGC_SEL_def (uint32_t) 0x00000001 854 #define fld_EXT_CLAMP_CAP_def (uint32_t) 0x00000001 855 #define fld_EXT_AGC_CAP_def (uint32_t) 0x00000001 856 #define fld_DECI_DITHER_EN_def (uint32_t) 0x00000001 857 #define fld_ADC_PREFHI_def (uint32_t) 0x00000000 858 #define fld_ADC_CH_GAIN_SEL_def (uint32_t) 0x00000001 859 860 #define fld_HS_PLL_SGAIN_def (uint32_t) 0x00000003 861 862 #define fld_NREn_def (uint32_t) 0x00000000 863 #define fld_NRGainCntl_def (uint32_t) 0x00000000 864 #define fld_NRBWTresh_def (uint32_t) 0x00000000 865 #define fld_NRGCTresh_def (uint32_t) 0x00000000 866 #define fld_NRCoefDespeclMode_def (uint32_t) 0x00000000 867 868 #define fld_GPIO_5_OE_def (uint32_t) 0x00000000 869 #define fld_GPIO_6_OE_def (uint32_t) 0x00000000 870 871 #define fld_GPIO_5_OUT_def (uint32_t) 0x00000000 872 #define fld_GPIO_6_OUT_def (uint32_t) 0x00000000 873 874 /* End of field default values. */ 875 876 #endif 877
Indexes created Tue Jul 21 00:24:56 UTC 2026