| /src/lib/libc/arch/arm/hardfloat/ |
| fpgetround.c | 63 uint32_t fpscr; local in function:__weak_alias
64 __asm __volatile("vmrs %0, fpscr" : "=r" (fpscr));
65 return __SHIFTOUT(fpscr, VFP_FPSCR_RMODE);
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| fpsetround.c | 63 uint32_t fpscr; local in function:__weak_alias
64 __asm __volatile("vmrs %0, fpscr" : "=r" (fpscr));
65 fp_rnd old_rnd = __SHIFTOUT(fpscr, VFP_FPSCR_RMODE);
66 fpscr ^= __SHIFTIN(new_rnd ^ old_rnd, VFP_FPSCR_RMODE);
67 __asm __volatile("vmsr fpscr, %0" :: "r" (fpscr));
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| /src/lib/libc/arch/powerpc64/gen/ |
| fpgetmask.c | 53 uint64_t fpscr; local in function:__weak_alias
55 __asm volatile("mffs %0" : "=f"(fpscr));
56 return (((uint32_t)fpscr & MASKBITS) >> MASKSHFT);
|
| fpgetround.c | 53 uint64_t fpscr; local in function:__weak_alias
55 __asm volatile("mffs %0" : "=f"(fpscr));
56 return (((uint32_t)fpscr & ROUNDBITS) >> ROUNDSHFT);
|
| fpgetsticky.c | 53 uint64_t fpscr; local in function:__weak_alias
55 __asm volatile("mffs %0" : "=f"(fpscr));
56 return (((uint32_t)fpscr & STICKYBITS) >> STICKYSHFT);
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| fpsetround.c | 52 uint64_t fpscr; local in function:__weak_alias
55 __asm volatile("mffs %0" : "=f"(fpscr));
56 old = (uint32_t)fpscr & ROUNDBITS;
57 fpscr &= ~ROUNDBITS;
58 fpscr |= rnd_dir & ROUNDBITS;
59 __asm volatile("mtfsf 0xff,%0" :: "f"(fpscr));
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| fpsetmask.c | 53 uint64_t fpscr; local in function:__weak_alias
56 __asm volatile("mffs %0" : "=f"(fpscr));
57 old = ((uint32_t)fpscr & MASKBITS) >> MASKSHFT;
58 fpscr &= ~MASKBITS;
59 fpscr |= ((uint32_t)mask << MASKSHFT) & MASKBITS;
60 __asm volatile("mtfsf 0xff,%0" :: "f"(fpscr));
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| fpsetsticky.c | 56 uint64_t fpscr; local in function:__weak_alias
59 __asm volatile("mffs %0" : "=f"(fpscr));
60 old = ((uint32_t)fpscr & STICKYBITS) >> STICKYSHFT;
67 fpscr &= ~INVBITS;
69 fpscr |= INVBITS;
70 fpscr &= ~STICKYBITS;
71 fpscr |= ((uint32_t)mask << STICKYSHFT) & STICKYBITS;
75 if (fpscr & (STICKYBITS|INVBITS))
76 fpscr |= FPSCR_FX;
78 fpscr &= ~FPSCR_FX
[all...] |
| /src/lib/libm/arch/arm/ |
| fenv.c | 109 int fpscr = armreg_fpscr_read(); local in function:feraiseexcept
110 fpscr |= __SHIFTIN(excepts, VFP_FPSCR_CSUM);
111 armreg_fpscr_write(fpscr);
130 int fpscr = armreg_fpscr_read(); local in function:fesetexceptflag
131 fpscr &= ~__SHIFTIN(excepts, VFP_FPSCR_CSUM);
132 fpscr |= __SHIFTIN((*flagp & excepts), VFP_FPSCR_CSUM);
133 armreg_fpscr_write(fpscr);
143 int fpscr = armreg_fpscr_read(); local in function:feenableexcept
144 armreg_fpscr_write(fpscr | __SHIFTIN((excepts), VFP_FPSCR_ESUM));
145 return __SHIFTOUT(fpscr, VFP_FPSCR_ESUM) & FE_ALL_EXCEPT
154 int fpscr = armreg_fpscr_read(); local in function:fedisableexcept
197 int fpscr = armreg_fpscr_read() & ~VFP_FPSCR_RMODE; local in function:fesetround
256 int fpscr = armreg_fpscr_read(); local in function:feupdateenv
[all...] |
| /src/sys/arch/powerpc/include/ |
| reg.h | 63 uint64_t fpscr; /* Status and Control Register */ member in struct:fpreg
66 double fpscr; /* Status and Control Register */
|
| /src/sys/arch/powerpc/powerpc/ |
| fpu.c | 138 uint32_t fpscr, ofpscr; local in function:fpu_get_fault_code
158 "mffs 0\n" /* get FPSCR */
166 "mffs 0\n" /* get FPSCR */
167 "stfd 0,0(%[fpscr])\n" /* store it */
170 [fpscr] "b"(&pcb->pcb_fpu.fpscr),
180 fpscr64 = *(uint64_t *)&pcb->pcb_fpu.fpscr;
181 ((uint32_t *)&pcb->pcb_fpu.fpscr)[_QUAD_LOWWORD] &= ~MASKBITS;
186 fpscr64 = *(uint64_t *)&pcb->pcb_fpu.fpscr;
187 ((uint32_t *)&pcb->pcb_fpu.fpscr)[_QUAD_LOWWORD] &= ~MASKBITS
[all...] |
| /src/sys/arch/powerpc/fpu/ |
| fpu_implode.c | 513 bool fpscr; local in function:fpu_implode
522 fpscr = type & FTYPE_FPSCR;
556 if (fpscr) {
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| /src/sys/compat/linux32/arch/aarch64/ |
| linux32_machdep.h | 65 uint32_t fpscr; member in struct:linux32_user_vfp
|
