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      1 /*	$NetBSD: nouveau_nvkm_subdev_bar_g84.c,v 1.3 2021/12/18 23:45:38 riastradh Exp $	*/
      2 
      3 /*
      4  * Copyright 2015 Red Hat Inc.
      5  *
      6  * Permission is hereby granted, free of charge, to any person obtaining a
      7  * copy of this software and associated documentation files (the "Software"),
      8  * to deal in the Software without restriction, including without limitation
      9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
     10  * and/or sell copies of the Software, and to permit persons to whom the
     11  * Software is furnished to do so, subject to the following conditions:
     12  *
     13  * The above copyright notice and this permission notice shall be included in
     14  * all copies or substantial portions of the Software.
     15  *
     16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     22  * OTHER DEALINGS IN THE SOFTWARE.
     23  *
     24  * Authors: Ben Skeggs <bskeggs (at) redhat.com>
     25  */
     26 #include <sys/cdefs.h>
     27 __KERNEL_RCSID(0, "$NetBSD: nouveau_nvkm_subdev_bar_g84.c,v 1.3 2021/12/18 23:45:38 riastradh Exp $");
     28 
     29 #include "nv50.h"
     30 
     31 #include <subdev/timer.h>
     32 
     33 void
     34 g84_bar_flush(struct nvkm_bar *bar)
     35 {
     36 	struct nvkm_device *device = bar->subdev.device;
     37 	unsigned long flags;
     38 	spin_lock_irqsave(&bar->lock, flags);
     39 	nvkm_wr32(device, 0x070000, 0x00000001);
     40 	nvkm_msec(device, 2000,
     41 		if (!(nvkm_rd32(device, 0x070000) & 0x00000002))
     42 			break;
     43 	);
     44 	spin_unlock_irqrestore(&bar->lock, flags);
     45 }
     46 
     47 static const struct nvkm_bar_func
     48 g84_bar_func = {
     49 	.dtor = nv50_bar_dtor,
     50 	.oneinit = nv50_bar_oneinit,
     51 	.init = nv50_bar_init,
     52 	.bar1.init = nv50_bar_bar1_init,
     53 	.bar1.fini = nv50_bar_bar1_fini,
     54 	.bar1.wait = nv50_bar_bar1_wait,
     55 	.bar1.vmm = nv50_bar_bar1_vmm,
     56 	.bar2.init = nv50_bar_bar2_init,
     57 	.bar2.fini = nv50_bar_bar2_fini,
     58 	.bar2.wait = nv50_bar_bar1_wait,
     59 	.bar2.vmm = nv50_bar_bar2_vmm,
     60 	.flush = g84_bar_flush,
     61 };
     62 
     63 int
     64 g84_bar_new(struct nvkm_device *device, int index, struct nvkm_bar **pbar)
     65 {
     66 	return nv50_bar_new_(&g84_bar_func, device, index, 0x200, pbar);
     67 }
     68