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      1 /*	$NetBSD: nouveau_nvkm_engine_disp_coreg84.c,v 1.3 2021/12/18 23:45:35 riastradh Exp $	*/
      2 
      3 /*
      4  * Copyright 2012 Red Hat Inc.
      5  *
      6  * Permission is hereby granted, free of charge, to any person obtaining a
      7  * copy of this software and associated documentation files (the "Software"),
      8  * to deal in the Software without restriction, including without limitation
      9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
     10  * and/or sell copies of the Software, and to permit persons to whom the
     11  * Software is furnished to do so, subject to the following conditions:
     12  *
     13  * The above copyright notice and this permission notice shall be included in
     14  * all copies or substantial portions of the Software.
     15  *
     16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     22  * OTHER DEALINGS IN THE SOFTWARE.
     23  *
     24  * Authors: Ben Skeggs
     25  */
     26 #include <sys/cdefs.h>
     27 __KERNEL_RCSID(0, "$NetBSD: nouveau_nvkm_engine_disp_coreg84.c,v 1.3 2021/12/18 23:45:35 riastradh Exp $");
     28 
     29 #include "channv50.h"
     30 
     31 const struct nv50_disp_mthd_list
     32 g84_disp_core_mthd_dac = {
     33 	.mthd = 0x0080,
     34 	.addr = 0x000008,
     35 	.data = {
     36 		{ 0x0400, 0x610b58 },
     37 		{ 0x0404, 0x610bdc },
     38 		{ 0x0420, 0x610bc4 },
     39 		{}
     40 	}
     41 };
     42 
     43 const struct nv50_disp_mthd_list
     44 g84_disp_core_mthd_head = {
     45 	.mthd = 0x0400,
     46 	.addr = 0x000540,
     47 	.data = {
     48 		{ 0x0800, 0x610ad8 },
     49 		{ 0x0804, 0x610ad0 },
     50 		{ 0x0808, 0x610a48 },
     51 		{ 0x080c, 0x610a78 },
     52 		{ 0x0810, 0x610ac0 },
     53 		{ 0x0814, 0x610af8 },
     54 		{ 0x0818, 0x610b00 },
     55 		{ 0x081c, 0x610ae8 },
     56 		{ 0x0820, 0x610af0 },
     57 		{ 0x0824, 0x610b08 },
     58 		{ 0x0828, 0x610b10 },
     59 		{ 0x082c, 0x610a68 },
     60 		{ 0x0830, 0x610a60 },
     61 		{ 0x0834, 0x000000 },
     62 		{ 0x0838, 0x610a40 },
     63 		{ 0x0840, 0x610a24 },
     64 		{ 0x0844, 0x610a2c },
     65 		{ 0x0848, 0x610aa8 },
     66 		{ 0x084c, 0x610ab0 },
     67 		{ 0x085c, 0x610c5c },
     68 		{ 0x0860, 0x610a84 },
     69 		{ 0x0864, 0x610a90 },
     70 		{ 0x0868, 0x610b18 },
     71 		{ 0x086c, 0x610b20 },
     72 		{ 0x0870, 0x610ac8 },
     73 		{ 0x0874, 0x610a38 },
     74 		{ 0x0878, 0x610c50 },
     75 		{ 0x0880, 0x610a58 },
     76 		{ 0x0884, 0x610a9c },
     77 		{ 0x089c, 0x610c68 },
     78 		{ 0x08a0, 0x610a70 },
     79 		{ 0x08a4, 0x610a50 },
     80 		{ 0x08a8, 0x610ae0 },
     81 		{ 0x08c0, 0x610b28 },
     82 		{ 0x08c4, 0x610b30 },
     83 		{ 0x08c8, 0x610b40 },
     84 		{ 0x08d4, 0x610b38 },
     85 		{ 0x08d8, 0x610b48 },
     86 		{ 0x08dc, 0x610b50 },
     87 		{ 0x0900, 0x610a18 },
     88 		{ 0x0904, 0x610ab8 },
     89 		{ 0x0910, 0x610c70 },
     90 		{ 0x0914, 0x610c78 },
     91 		{}
     92 	}
     93 };
     94 
     95 const struct nv50_disp_chan_mthd
     96 g84_disp_core_mthd = {
     97 	.name = "Core",
     98 	.addr = 0x000000,
     99 	.prev = 0x000004,
    100 	.data = {
    101 		{ "Global", 1, &nv50_disp_core_mthd_base },
    102 		{    "DAC", 3, &g84_disp_core_mthd_dac  },
    103 		{    "SOR", 2, &nv50_disp_core_mthd_sor  },
    104 		{   "PIOR", 3, &nv50_disp_core_mthd_pior },
    105 		{   "HEAD", 2, &g84_disp_core_mthd_head },
    106 		{}
    107 	}
    108 };
    109 
    110 int
    111 g84_disp_core_new(const struct nvkm_oclass *oclass, void *argv, u32 argc,
    112 		  struct nv50_disp *disp, struct nvkm_object **pobject)
    113 {
    114 	return nv50_disp_core_new_(&nv50_disp_core_func, &g84_disp_core_mthd,
    115 				   disp, 0, oclass, argv, argc, pobject);
    116 }
    117