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      1 /*	$NetBSD: nouveau_nvkm_engine_disp_coreg94.c,v 1.3 2021/12/18 23:45:35 riastradh Exp $	*/
      2 
      3 /*
      4  * Copyright 2012 Red Hat Inc.
      5  *
      6  * Permission is hereby granted, free of charge, to any person obtaining a
      7  * copy of this software and associated documentation files (the "Software"),
      8  * to deal in the Software without restriction, including without limitation
      9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
     10  * and/or sell copies of the Software, and to permit persons to whom the
     11  * Software is furnished to do so, subject to the following conditions:
     12  *
     13  * The above copyright notice and this permission notice shall be included in
     14  * all copies or substantial portions of the Software.
     15  *
     16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     22  * OTHER DEALINGS IN THE SOFTWARE.
     23  *
     24  * Authors: Ben Skeggs
     25  */
     26 #include <sys/cdefs.h>
     27 __KERNEL_RCSID(0, "$NetBSD: nouveau_nvkm_engine_disp_coreg94.c,v 1.3 2021/12/18 23:45:35 riastradh Exp $");
     28 
     29 #include "channv50.h"
     30 
     31 static const struct nv50_disp_mthd_list
     32 g94_disp_core_mthd_sor = {
     33 	.mthd = 0x0040,
     34 	.addr = 0x000008,
     35 	.data = {
     36 		{ 0x0600, 0x610794 },
     37 		{}
     38 	}
     39 };
     40 
     41 const struct nv50_disp_chan_mthd
     42 g94_disp_core_mthd = {
     43 	.name = "Core",
     44 	.addr = 0x000000,
     45 	.prev = 0x000004,
     46 	.data = {
     47 		{ "Global", 1, &nv50_disp_core_mthd_base },
     48 		{    "DAC", 3, &g84_disp_core_mthd_dac },
     49 		{    "SOR", 4, &g94_disp_core_mthd_sor },
     50 		{   "PIOR", 3, &nv50_disp_core_mthd_pior },
     51 		{   "HEAD", 2, &g84_disp_core_mthd_head },
     52 		{}
     53 	}
     54 };
     55 
     56 int
     57 g94_disp_core_new(const struct nvkm_oclass *oclass, void *argv, u32 argc,
     58 		  struct nv50_disp *disp, struct nvkm_object **pobject)
     59 {
     60 	return nv50_disp_core_new_(&nv50_disp_core_func, &g94_disp_core_mthd,
     61 				   disp, 0, oclass, argv, argc, pobject);
     62 }
     63