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    Searched defs:getImm (Results 1 - 24 of 24) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
MipsISelDAGToDAG.h 137 // getImm - Return a target constant with the specified value.
138 inline SDValue getImm(const SDNode *Node, uint64_t Imm) {
  /src/external/apache2/llvm/dist/llvm/include/llvm/MC/
MCInst.h 80 int64_t getImm() const {
  /src/external/apache2/llvm/dist/llvm/lib/Target/BPF/AsmParser/
BPFAsmParser.cpp 131 return isImm() && isa<MCConstantExpr>(getImm());
135 const MCExpr *Val = getImm();
153 const MCExpr *getImm() const {
166 OS << *getImm();
195 addExpr(Inst, getImm());
  /src/external/apache2/llvm/dist/llvm/lib/Target/CSKY/AsmParser/
CSKYAsmParser.cpp 144 bool IsConstantImm = evaluateConstantImm(getImm(), Imm);
153 bool IsConstantImm = evaluateConstantImm(getImm(), Imm);
162 bool IsConstantImm = evaluateConstantImm(getImm(), Imm);
182 return isImm() && !evaluateConstantImm(getImm(), Imm);
188 return isImm() && !evaluateConstantImm(getImm(), Imm);
201 const MCExpr *getImm() const {
214 OS << *getImm();
267 addExpr(Inst, getImm());
  /src/external/apache2/llvm/dist/llvm/utils/TableGen/
CodeGenInstruction.h 369 int64_t getImm() const { assert(isImm()); return Imm; }
  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
MachineOperand.h 537 int64_t getImm() const {
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
MVETPAndVPTOptimisationsPass.cpp 538 return ARMCC::CondCodes(Instr.getOperand(3).getImm());
908 auto getImm = [&](Register GPR) -> unsigned {
912 return Def->getOperand(1).getImm();
915 unsigned Imm = getImm(GPR);
  /src/external/apache2/llvm/dist/llvm/lib/Target/AVR/AsmParser/
AVRAsmParser.cpp 151 const MCExpr *Expr = getImm();
161 addExpr(Inst, getImm());
168 const auto *CE = cast<MCConstantExpr>(getImm());
174 const auto *CE = dyn_cast<MCConstantExpr>(getImm());
197 const MCExpr *getImm() const {
253 O << "Immediate: \"" << *getImm() << "\"";
258 O << "Memri: \"" << getReg() << '+' << *getImm() << "\"";
721 if (MCConstantExpr const *Const = dyn_cast<MCConstantExpr>(Op.getImm())) {
  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/
MachineIRBuilder.h 193 int64_t getImm() const {
  /src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/AsmParser/
LanaiAsmParser.cpp 161 const MCExpr *getImm() const {
409 addExpr(Inst, getImm());
414 addExpr(Inst, getImm());
419 addExpr(Inst, getImm());
424 addExpr(Inst, getImm());
458 addExpr(Inst, getImm());
463 addExpr(Inst, getImm());
468 if (const MCConstantExpr *ConstExpr = dyn_cast<MCConstantExpr>(getImm()))
471 else if (isa<LanaiMCExpr>(getImm())) {
473 const LanaiMCExpr *SymbolRefExpr = dyn_cast<LanaiMCExpr>(getImm());
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  /src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/AsmParser/
RISCVAsmParser.cpp 363 bool IsConstantImm = evaluateConstantImm(getImm(), Imm, VK);
366 IsValid = RISCVAsmParser::classifySymbolRef(getImm(), VK);
378 if (!isImm() || evaluateConstantImm(getImm(), Imm, VK))
380 return RISCVAsmParser::classifySymbolRef(getImm(), VK) &&
388 if (!isImm() || evaluateConstantImm(getImm(), Imm, VK))
390 return RISCVAsmParser::classifySymbolRef(getImm(), VK) &&
399 if (!isImm() || evaluateConstantImm(getImm(), Imm, VK))
401 return RISCVAsmParser::classifySymbolRef(getImm(), VK) &&
409 if (!isImm() || evaluateConstantImm(getImm(), Imm, VK))
411 return RISCVAsmParser::classifySymbolRef(getImm(), VK) &
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  /src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/AsmParser/
SparcAsmParser.cpp 327 const MCExpr *getImm() const {
360 case k_Immediate: OS << "Imm: " << getImm() << "\n"; break;
377 const MCExpr *Expr = getImm();
383 addExpr(Inst, getImm());
387 addExpr(Inst, getImm());
420 const MCExpr *Expr = getImm();
426 addExpr(Inst, getImm());
546 const MCExpr *Imm = Op->getImm();
566 int64_t RawImmValue = IsImm ? MCValOp.getImm() : 0;
859 if (!Mask->isImm() || !Mask->getImm()->evaluateAsAbsolute(ImmVal) |
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  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/AsmParser/
X86Operand.h 169 const MCExpr *getImm() const {
217 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm());
231 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm());
245 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm());
259 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm());
272 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm());
281 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm());
541 addExpr(Inst, getImm());
546 addExpr(Inst, getImm());
X86AsmParser.cpp 468 int64_t getImm() { return Imm + IC.execute(); }
2157 if (!(SM.getBaseReg() || SM.getIndexReg() || SM.getImm())) {
2175 SM.getImm(), SM.isMemExpr());
2524 int64_t Imm = SM.getImm();
3657 if (!Inst.getOperand(2).isImm() || Inst.getOperand(2).getImm() != 1)
3710 Inst.getOperand(X86::AddrNumOperands).getImm() != 1)
3756 if (!Inst.getOperand(0).isImm() || Inst.getOperand(0).getImm() != 3)
4450 const auto *CE = dyn_cast<MCConstantExpr>(X86Op->getImm());
  /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/AsmParser/
HexagonAsmParser.cpp 257 const MCExpr *getImm() const {
270 const MCExpr *myMCExpr = &HexagonMCInstrInfo::getExpr(*getImm());
364 if (!getImm()->evaluateAsAbsolute(Value))
389 Inst.addOperand(MCOperand::createExpr(getImm()));
395 const_cast<HexagonMCExpr *>(cast<HexagonMCExpr>(getImm()));
456 getImm()->print(OS, nullptr);
542 int64_t Value(I.getImm());
  /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
HexagonHardwareLoops.cpp 354 unsigned getImm() const {
780 int64_t StartV = Start->getImm();
781 int64_t EndV = End->getImm();
855 StartV = Start->getImm();
857 EndV = End->getImm();
932 EndValInstr->getOperand(2).getImm() == StartV) {
1259 int64_t CountImm = TripCount->getImm();
1428 return (EndVal->getImm() == Imm);
1499 Val = MO.getImm();
1546 unsigned Sub2 = DI->getOperand(2).getImm();
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  /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/AsmParser/
PPCAsmParser.cpp 245 int64_t getImm() const {
316 bool isU1Imm() const { return Kind == Immediate && isUInt<1>(getImm()); }
317 bool isU2Imm() const { return Kind == Immediate && isUInt<2>(getImm()); }
318 bool isU3Imm() const { return Kind == Immediate && isUInt<3>(getImm()); }
319 bool isU4Imm() const { return Kind == Immediate && isUInt<4>(getImm()); }
320 bool isU5Imm() const { return Kind == Immediate && isUInt<5>(getImm()); }
321 bool isS5Imm() const { return Kind == Immediate && isInt<5>(getImm()); }
322 bool isU6Imm() const { return Kind == Immediate && isUInt<6>(getImm()); }
324 isUInt<6>(getImm()) &&
325 (getImm() & 1) == 0;
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  /src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/AsmParser/
SystemZAsmParser.cpp 237 const MCExpr *getImm() const {
301 addExpr(Inst, getImm());
716 printMCExpr(getImm(), OS);
  /src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
SystemZISelDAGToDAG.cpp 138 inline SDValue getImm(const SDNode *Node, uint64_t Imm) const {
  /src/external/apache2/llvm/dist/llvm/lib/Target/VE/AsmParser/
VEAsmParser.cpp 349 const MCExpr *getImm() const {
422 OS << "Imm: " << getImm() << "\n";
469 const MCExpr *Expr = getImm();
679 const auto *ConstExpr = dyn_cast<MCConstantExpr>(Op.getImm());
692 const MCExpr *Imm = Op->getImm();
703 const MCExpr *Imm = Op->getImm();
714 const MCExpr *Imm = Op->getImm();
726 const MCExpr *Imm = Op->getImm();
737 const MCExpr *Imm = Op->getImm();
748 const MCExpr *Imm = Op->getImm();
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  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/AsmParser/
AArch64AsmParser.cpp 533 const MCExpr *getImm() const {
673 const MCConstantExpr *MCE = dyn_cast<MCConstantExpr>(getImm());
695 const MCConstantExpr *MCE = dyn_cast<MCConstantExpr>(getImm());
719 auto *MCE = dyn_cast<MCConstantExpr>(getImm());
768 const MCConstantExpr *MCE = dyn_cast<MCConstantExpr>(getImm());
770 return isSymbolicUImm12Offset(getImm());
780 const MCConstantExpr *MCE = dyn_cast<MCConstantExpr>(getImm());
793 const MCConstantExpr *MCE = dyn_cast<MCConstantExpr>(getImm());
819 if (auto *CE = dyn_cast<MCConstantExpr>(getImm())) {
843 Expr = getImm();
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  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AsmParser/
AMDGPUAsmParser.cpp 333 bool isOffset() const { return isImmTy(ImmTyOffset) && isUInt<16>(getImm()); }
334 bool isOffset0() const { return isImmTy(ImmTyOffset0) && isUInt<8>(getImm()); }
335 bool isOffset1() const { return isImmTy(ImmTyOffset1) && isUInt<8>(getImm()); }
344 bool isFORMAT() const { return isImmTy(ImmTyFORMAT) && isUInt<7>(getImm()); }
845 int64_t getImm() const {
1045 OS << '<' << getImm();
3073 if (!Op.isImm() || Op.getImm() != AMDGPU::SDWA::SdwaSel::DWORD) {
3165 int64_t Val = MO.getImm();
3370 return Inst.getOperand(ClampIdx).getImm() == 0;
3394 unsigned TFESize = (TFEIdx != -1 && Inst.getOperand(TFEIdx).getImm()) ? 1 : 0
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  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/AsmParser/
ARMAsmParser.cpp 978 const MCExpr *getImm() const {
1038 if (const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm()))
1047 if (const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm()))
1121 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm());
1130 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm());
1139 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm());
1147 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm());
1184 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm());
1193 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm());
1222 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm());
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  /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/AsmParser/
MipsAsmParser.cpp 1222 addExpr(Inst, getImm());
1231 addExpr(Inst, getImm());
1249 const MCExpr *Expr = getImm();
1291 return isImm() && getImm()->evaluateAsAbsolute(Res);
1404 bool Success = getImm()->evaluateAsRelocatable(Res, nullptr, nullptr);
1460 const MCExpr *getImm() const {
1466 const MCExpr *Val = getImm();
1854 return !isInt<9>(Op.getImm());
1856 return !isInt<16>(Op.getImm());
1903 if (!isIntN(inMicroMipsMode() ? 17 : 18, Offset.getImm()))
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