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Searched
defs:getRegForInlineAsmConstraint
(Results
1 - 18
of
18
) sorted by relevancy
/src/external/apache2/llvm/dist/llvm/lib/Target/BPF/
BPFISelLowering.cpp
238
BPFTargetLowering::
getRegForInlineAsmConstraint
(const TargetRegisterInfo *TRI,
254
return TargetLowering::
getRegForInlineAsmConstraint
(TRI, Constraint, VT);
/src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/
LanaiISelLowering.cpp
236
LanaiTargetLowering::
getRegForInlineAsmConstraint
(const TargetRegisterInfo *TRI,
248
return TargetLowering::
getRegForInlineAsmConstraint
(TRI, Constraint, VT);
/src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/
MSP430ISelLowering.cpp
394
MSP430TargetLowering::
getRegForInlineAsmConstraint
(
408
return TargetLowering::
getRegForInlineAsmConstraint
(TRI, Constraint, VT);
/src/external/apache2/llvm/dist/llvm/lib/Target/AVR/
AVRISelLowering.cpp
1915
AVRTargetLowering::
getRegForInlineAsmConstraint
(const TargetRegisterInfo *TRI,
1960
return TargetLowering::
getRegForInlineAsmConstraint
(
/src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/
WebAssemblyISelLowering.cpp
593
WebAssemblyTargetLowering::
getRegForInlineAsmConstraint
(
627
return TargetLowering::
getRegForInlineAsmConstraint
(TRI, Constraint, VT);
/src/external/apache2/llvm/dist/llvm/lib/Target/XCore/
XCoreISelLowering.cpp
1926
XCoreTargetLowering::
getRegForInlineAsmConstraint
(const TargetRegisterInfo *TRI,
1938
return TargetLowering::
getRegForInlineAsmConstraint
(TRI, Constraint, VT);
/src/external/apache2/llvm/dist/llvm/lib/Target/M68k/
M68kISelLowering.cpp
2843
M68kTargetLowering::
getRegForInlineAsmConstraint
(const TargetRegisterInfo *TRI,
2876
return TargetLowering::
getRegForInlineAsmConstraint
(TRI, Constraint, VT);
/src/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/
NVPTXISelLowering.cpp
4255
NVPTXTargetLowering::
getRegForInlineAsmConstraint
(const TargetRegisterInfo *TRI,
4277
return TargetLowering::
getRegForInlineAsmConstraint
(TRI, Constraint, VT);
/src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/
SparcISelLowering.cpp
3262
SparcTargetLowering::
getRegForInlineAsmConstraint
(const TargetRegisterInfo *TRI,
3311
return TargetLowering::
getRegForInlineAsmConstraint
(TRI, newConstraint,
3327
return TargetLowering::
getRegForInlineAsmConstraint
(TRI, newConstraint,
3332
return TargetLowering::
getRegForInlineAsmConstraint
(TRI, Constraint, VT);
/src/external/apache2/llvm/dist/llvm/lib/Target/VE/
VEISelLowering.cpp
2615
VETargetLowering::
getRegForInlineAsmConstraint
(const TargetRegisterInfo *TRI,
2622
return TargetLowering::
getRegForInlineAsmConstraint
(TRI, Constraint, VT);
2633
return TargetLowering::
getRegForInlineAsmConstraint
(TRI, Constraint, VT);
/src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
MipsISelLowering.cpp
4094
MipsTargetLowering::
getRegForInlineAsmConstraint
(const TargetRegisterInfo *TRI,
4158
return TargetLowering::
getRegForInlineAsmConstraint
(TRI, Constraint, VT);
/src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
TargetLowering.cpp
4563
TargetLowering::
getRegForInlineAsmConstraint
(const TargetRegisterInfo *RI,
4789
getRegForInlineAsmConstraint
(TRI, OpInfo.ConstraintCode,
4792
getRegForInlineAsmConstraint
(TRI, Input.ConstraintCode,
/src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
SystemZISelLowering.cpp
1127
SystemZTargetLowering::
getRegForInlineAsmConstraint
(
1213
return TargetLowering::
getRegForInlineAsmConstraint
(TRI, Constraint, VT);
/src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
SIISelLowering.cpp
11501
SITargetLowering::
getRegForInlineAsmConstraint
(const TargetRegisterInfo *TRI_,
11511
return TargetLowering::
getRegForInlineAsmConstraint
(TRI, Constraint, VT);
11580
return TargetLowering::
getRegForInlineAsmConstraint
(TRI, Constraint, VT);
12263
std::tie(AssignedReg, RC) =
getRegForInlineAsmConstraint
(
/src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
RISCVISelLowering.cpp
8037
RISCVTargetLowering::
getRegForInlineAsmConstraint
(const TargetRegisterInfo *TRI,
8108
// Since TargetLowering::
getRegForInlineAsmConstraint
uses the name of the
8211
return TargetLowering::
getRegForInlineAsmConstraint
(TRI, Constraint, VT);
/src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
PPCISelLowering.cpp
15605
PPCTargetLowering::
getRegForInlineAsmConstraint
(const TargetRegisterInfo *TRI,
15695
TargetLowering::
getRegForInlineAsmConstraint
(TRI, Constraint, VT);
15701
// FIXME: If TargetLowering::
getRegForInlineAsmConstraint
could somehow use
/src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64ISelLowering.cpp
7899
AArch64TargetLowering::
getRegForInlineAsmConstraint
(
7961
Res = TargetLowering::
getRegForInlineAsmConstraint
(TRI, Constraint, VT);
/src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMISelLowering.cpp
18433
RCPair ARMTargetLowering::
getRegForInlineAsmConstraint
(
18504
return TargetLowering::
getRegForInlineAsmConstraint
(TRI, Constraint, VT);
Completed in 136 milliseconds
Indexes created Tue Feb 24 01:34:59 UTC 2026