1 /* $NetBSD: nouveau_nvkm_subdev_ltc_gf100.c,v 1.4 2021/12/18 23:45:40 riastradh Exp $ */ 2 3 /* 4 * Copyright 2012 Red Hat Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: Ben Skeggs 25 */ 26 #include <sys/cdefs.h> 27 __KERNEL_RCSID(0, "$NetBSD: nouveau_nvkm_subdev_ltc_gf100.c,v 1.4 2021/12/18 23:45:40 riastradh Exp $"); 28 29 #include "priv.h" 30 31 #include <core/memory.h> 32 #include <subdev/fb.h> 33 #include <subdev/timer.h> 34 35 void 36 gf100_ltc_cbc_clear(struct nvkm_ltc *ltc, u32 start, u32 limit) 37 { 38 struct nvkm_device *device = ltc->subdev.device; 39 nvkm_wr32(device, 0x17e8cc, start); 40 nvkm_wr32(device, 0x17e8d0, limit); 41 nvkm_wr32(device, 0x17e8c8, 0x00000004); 42 } 43 44 void 45 gf100_ltc_cbc_wait(struct nvkm_ltc *ltc) 46 { 47 struct nvkm_device *device = ltc->subdev.device; 48 int c, s; 49 for (c = 0; c < ltc->ltc_nr; c++) { 50 for (s = 0; s < ltc->lts_nr; s++) { 51 const u32 addr = 0x1410c8 + (c * 0x2000) + (s * 0x400); 52 nvkm_msec(device, 2000, 53 if (!nvkm_rd32(device, addr)) 54 break; 55 ); 56 } 57 } 58 } 59 60 void 61 gf100_ltc_zbc_clear_color(struct nvkm_ltc *ltc, int i, const u32 color[4]) 62 { 63 struct nvkm_device *device = ltc->subdev.device; 64 nvkm_mask(device, 0x17ea44, 0x0000000f, i); 65 nvkm_wr32(device, 0x17ea48, color[0]); 66 nvkm_wr32(device, 0x17ea4c, color[1]); 67 nvkm_wr32(device, 0x17ea50, color[2]); 68 nvkm_wr32(device, 0x17ea54, color[3]); 69 } 70 71 void 72 gf100_ltc_zbc_clear_depth(struct nvkm_ltc *ltc, int i, const u32 depth) 73 { 74 struct nvkm_device *device = ltc->subdev.device; 75 nvkm_mask(device, 0x17ea44, 0x0000000f, i); 76 nvkm_wr32(device, 0x17ea58, depth); 77 } 78 79 const struct nvkm_bitfield 80 gf100_ltc_lts_intr_name[] = { 81 { 0x00000001, "IDLE_ERROR_IQ" }, 82 { 0x00000002, "IDLE_ERROR_CBC" }, 83 { 0x00000004, "IDLE_ERROR_TSTG" }, 84 { 0x00000008, "IDLE_ERROR_DSTG" }, 85 { 0x00000010, "EVICTED_CB" }, 86 { 0x00000020, "ILLEGAL_COMPSTAT" }, 87 { 0x00000040, "BLOCKLINEAR_CB" }, 88 { 0x00000100, "ECC_SEC_ERROR" }, 89 { 0x00000200, "ECC_DED_ERROR" }, 90 { 0x00000400, "DEBUG" }, 91 { 0x00000800, "ATOMIC_TO_Z" }, 92 { 0x00001000, "ILLEGAL_ATOMIC" }, 93 { 0x00002000, "BLKACTIVITY_ERR" }, 94 {} 95 }; 96 97 static void 98 gf100_ltc_lts_intr(struct nvkm_ltc *ltc, int c, int s) 99 { 100 struct nvkm_subdev *subdev = <c->subdev; 101 struct nvkm_device *device = subdev->device; 102 u32 base = 0x141000 + (c * 0x2000) + (s * 0x400); 103 u32 intr = nvkm_rd32(device, base + 0x020); 104 u32 stat = intr & 0x0000ffff; 105 char msg[128]; 106 107 if (stat) { 108 nvkm_snprintbf(msg, sizeof(msg), gf100_ltc_lts_intr_name, stat); 109 nvkm_error(subdev, "LTC%d_LTS%d: %08x [%s]\n", c, s, stat, msg); 110 } 111 112 nvkm_wr32(device, base + 0x020, intr); 113 } 114 115 void 116 gf100_ltc_intr(struct nvkm_ltc *ltc) 117 { 118 struct nvkm_device *device = ltc->subdev.device; 119 u32 mask; 120 121 mask = nvkm_rd32(device, 0x00017c); 122 while (mask) { 123 u32 s, c = __ffs(mask); 124 for (s = 0; s < ltc->lts_nr; s++) 125 gf100_ltc_lts_intr(ltc, c, s); 126 mask &= ~(1 << c); 127 } 128 } 129 130 void 131 gf100_ltc_invalidate(struct nvkm_ltc *ltc) 132 { 133 struct nvkm_device *device = ltc->subdev.device; 134 s64 taken; 135 136 nvkm_wr32(device, 0x70004, 0x00000001); 137 taken = nvkm_wait_msec(device, 2000, 0x70004, 0x00000003, 0x00000000); 138 139 if (taken > 0) 140 nvkm_debug(<c->subdev, "LTC invalidate took %"PRId64" ns\n", taken); 141 } 142 143 void 144 gf100_ltc_flush(struct nvkm_ltc *ltc) 145 { 146 struct nvkm_device *device = ltc->subdev.device; 147 s64 taken; 148 149 nvkm_wr32(device, 0x70010, 0x00000001); 150 taken = nvkm_wait_msec(device, 2000, 0x70010, 0x00000003, 0x00000000); 151 152 if (taken > 0) 153 nvkm_debug(<c->subdev, "LTC flush took %"PRId64" ns\n", taken); 154 } 155 156 /* TODO: Figure out tag memory details and drop the over-cautious allocation. 157 */ 158 int 159 gf100_ltc_oneinit_tag_ram(struct nvkm_ltc *ltc) 160 { 161 struct nvkm_device *device = ltc->subdev.device; 162 struct nvkm_fb *fb = device->fb; 163 struct nvkm_ram *ram = fb->ram; 164 u32 bits = (nvkm_rd32(device, 0x100c80) & 0x00001000) ? 16 : 17; 165 u32 tag_size, tag_margin, tag_align; 166 int ret; 167 168 /* No VRAM, no tags for now. */ 169 if (!ram) { 170 ltc->num_tags = 0; 171 goto mm_init; 172 } 173 174 /* tags for 1/4 of VRAM should be enough (8192/4 per GiB of VRAM) */ 175 ltc->num_tags = (ram->size >> 17) / 4; 176 if (ltc->num_tags > (1 << bits)) 177 ltc->num_tags = 1 << bits; /* we have 16/17 bits in PTE */ 178 ltc->num_tags = (ltc->num_tags + 63) & ~63; /* round up to 64 */ 179 180 tag_align = ltc->ltc_nr * 0x800; 181 tag_margin = (tag_align < 0x6000) ? 0x6000 : tag_align; 182 183 /* 4 part 4 sub: 0x2000 bytes for 56 tags */ 184 /* 3 part 4 sub: 0x6000 bytes for 168 tags */ 185 /* 186 * About 147 bytes per tag. Let's be safe and allocate x2, which makes 187 * 0x4980 bytes for 64 tags, and round up to 0x6000 bytes for 64 tags. 188 * 189 * For 4 GiB of memory we'll have 8192 tags which makes 3 MiB, < 0.1 %. 190 */ 191 tag_size = (ltc->num_tags / 64) * 0x6000 + tag_margin; 192 tag_size += tag_align; 193 194 ret = nvkm_ram_get(device, NVKM_RAM_MM_NORMAL, 0x01, 12, tag_size, 195 true, true, <c->tag_ram); 196 if (ret) { 197 ltc->num_tags = 0; 198 } else { 199 u64 tag_base = nvkm_memory_addr(ltc->tag_ram) + tag_margin; 200 201 tag_base += tag_align - 1; 202 do_div(tag_base, tag_align); 203 204 ltc->tag_base = tag_base; 205 } 206 207 mm_init: 208 nvkm_mm_fini(&fb->tags); 209 return nvkm_mm_init(&fb->tags, 0, 0, ltc->num_tags, 1); 210 } 211 212 int 213 gf100_ltc_oneinit(struct nvkm_ltc *ltc) 214 { 215 struct nvkm_device *device = ltc->subdev.device; 216 const u32 parts = nvkm_rd32(device, 0x022438); 217 const u32 mask = nvkm_rd32(device, 0x022554); 218 const u32 slice = nvkm_rd32(device, 0x17e8dc) >> 28; 219 int i; 220 221 for (i = 0; i < parts; i++) { 222 if (!(mask & (1 << i))) 223 ltc->ltc_nr++; 224 } 225 ltc->lts_nr = slice; 226 227 return gf100_ltc_oneinit_tag_ram(ltc); 228 } 229 230 static void 231 gf100_ltc_init(struct nvkm_ltc *ltc) 232 { 233 struct nvkm_device *device = ltc->subdev.device; 234 u32 lpg128 = !(nvkm_rd32(device, 0x100c80) & 0x00000001); 235 236 nvkm_mask(device, 0x17e820, 0x00100000, 0x00000000); /* INTR_EN &= ~0x10 */ 237 nvkm_wr32(device, 0x17e8d8, ltc->ltc_nr); 238 nvkm_wr32(device, 0x17e8d4, ltc->tag_base); 239 nvkm_mask(device, 0x17e8c0, 0x00000002, lpg128 ? 0x00000002 : 0x00000000); 240 } 241 242 static const struct nvkm_ltc_func 243 gf100_ltc = { 244 .oneinit = gf100_ltc_oneinit, 245 .init = gf100_ltc_init, 246 .intr = gf100_ltc_intr, 247 .cbc_clear = gf100_ltc_cbc_clear, 248 .cbc_wait = gf100_ltc_cbc_wait, 249 .zbc = 16, 250 .zbc_clear_color = gf100_ltc_zbc_clear_color, 251 .zbc_clear_depth = gf100_ltc_zbc_clear_depth, 252 .invalidate = gf100_ltc_invalidate, 253 .flush = gf100_ltc_flush, 254 }; 255 256 int 257 gf100_ltc_new(struct nvkm_device *device, int index, struct nvkm_ltc **pltc) 258 { 259 return nvkm_ltc_new_(&gf100_ltc, device, index, pltc); 260 } 261
Indexes created Sun Sep 28 16:09:52 GMT 2025