1 /* $NetBSD: nouveau_nvkm_subdev_pci_gf100.c,v 1.3 2021/12/18 23:45:41 riastradh Exp $ */ 2 3 /* 4 * Copyright 2015 Red Hat Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: Ben Skeggs <bskeggs (at) redhat.com> 25 */ 26 #include <sys/cdefs.h> 27 __KERNEL_RCSID(0, "$NetBSD: nouveau_nvkm_subdev_pci_gf100.c,v 1.3 2021/12/18 23:45:41 riastradh Exp $"); 28 29 #include "priv.h" 30 31 static void 32 gf100_pci_msi_rearm(struct nvkm_pci *pci) 33 { 34 nvkm_pci_wr08(pci, 0x0704, 0xff); 35 } 36 37 void 38 gf100_pcie_set_version(struct nvkm_pci *pci, u8 ver) 39 { 40 struct nvkm_device *device = pci->subdev.device; 41 nvkm_mask(device, 0x02241c, 0x1, ver > 1 ? 1 : 0); 42 } 43 44 int 45 gf100_pcie_version(struct nvkm_pci *pci) 46 { 47 struct nvkm_device *device = pci->subdev.device; 48 return (nvkm_rd32(device, 0x02241c) & 0x1) + 1; 49 } 50 51 void 52 gf100_pcie_set_cap_speed(struct nvkm_pci *pci, bool full_speed) 53 { 54 struct nvkm_device *device = pci->subdev.device; 55 nvkm_mask(device, 0x02241c, 0x80, full_speed ? 0x80 : 0x0); 56 } 57 58 int 59 gf100_pcie_cap_speed(struct nvkm_pci *pci) 60 { 61 struct nvkm_device *device = pci->subdev.device; 62 u8 punits_pci_cap_speed = nvkm_rd32(device, 0x02241c) & 0x80; 63 if (punits_pci_cap_speed == 0x80) 64 return 1; 65 return 0; 66 } 67 68 int 69 gf100_pcie_init(struct nvkm_pci *pci) 70 { 71 bool full_speed = g84_pcie_cur_speed(pci) == NVKM_PCIE_SPEED_5_0; 72 gf100_pcie_set_cap_speed(pci, full_speed); 73 return 0; 74 } 75 76 int 77 gf100_pcie_set_link(struct nvkm_pci *pci, enum nvkm_pcie_speed speed, u8 width) 78 { 79 gf100_pcie_set_cap_speed(pci, speed == NVKM_PCIE_SPEED_5_0); 80 g84_pcie_set_link_speed(pci, speed); 81 return 0; 82 } 83 84 static const struct nvkm_pci_func 85 gf100_pci_func = { 86 .init = g84_pci_init, 87 .rd32 = nv40_pci_rd32, 88 .wr08 = nv40_pci_wr08, 89 .wr32 = nv40_pci_wr32, 90 .msi_rearm = gf100_pci_msi_rearm, 91 92 .pcie.init = gf100_pcie_init, 93 .pcie.set_link = gf100_pcie_set_link, 94 95 .pcie.max_speed = g84_pcie_max_speed, 96 .pcie.cur_speed = g84_pcie_cur_speed, 97 98 .pcie.set_version = gf100_pcie_set_version, 99 .pcie.version = gf100_pcie_version, 100 .pcie.version_supported = g92_pcie_version_supported, 101 }; 102 103 int 104 gf100_pci_new(struct nvkm_device *device, int index, struct nvkm_pci **ppci) 105 { 106 return nvkm_pci_new_(&gf100_pci_func, device, index, ppci); 107 } 108