1 /* $NetBSD: nouveau_nvkm_engine_pm_gf100.c,v 1.3 2021/12/18 23:45:37 riastradh Exp $ */ 2 3 /* 4 * Copyright 2013 Red Hat Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: Ben Skeggs 25 */ 26 #include <sys/cdefs.h> 27 __KERNEL_RCSID(0, "$NetBSD: nouveau_nvkm_engine_pm_gf100.c,v 1.3 2021/12/18 23:45:37 riastradh Exp $"); 28 29 #include "gf100.h" 30 31 const struct nvkm_specsrc 32 gf100_pbfb_sources[] = { 33 { 0x10f100, (const struct nvkm_specmux[]) { 34 { 0x1, 0, "unk0" }, 35 { 0x3f, 4, "unk4" }, 36 {} 37 }, "pbfb_broadcast_pm_unk100" }, 38 {} 39 }; 40 41 const struct nvkm_specsrc 42 gf100_pmfb_sources[] = { 43 { 0x140028, (const struct nvkm_specmux[]) { 44 { 0x3fff, 0, "unk0" }, 45 { 0x7, 16, "unk16" }, 46 { 0x3, 24, "unk24" }, 47 { 0x2, 29, "unk29" }, 48 {} 49 }, "pmfb0_pm_unk28" }, 50 {} 51 }; 52 53 static const struct nvkm_specsrc 54 gf100_l1_sources[] = { 55 { 0x5044a8, (const struct nvkm_specmux[]) { 56 { 0x3f, 0, "sel", true }, 57 {} 58 }, "pgraph_gpc0_tpc0_l1_pm_mux" }, 59 {} 60 }; 61 62 static const struct nvkm_specsrc 63 gf100_tex_sources[] = { 64 { 0x5042c0, (const struct nvkm_specmux[]) { 65 { 0xf, 0, "sel0", true }, 66 { 0x7, 8, "sel1", true }, 67 {} 68 }, "pgraph_gpc0_tpc0_tex_pm_mux_c_d" }, 69 {} 70 }; 71 72 static const struct nvkm_specsrc 73 gf100_unk400_sources[] = { 74 { 0x50440c, (const struct nvkm_specmux[]) { 75 { 0x3f, 0, "sel", true }, 76 {} 77 }, "pgraph_gpc0_tpc0_unk400_pm_mux" }, 78 {} 79 }; 80 81 static const struct nvkm_specdom 82 gf100_pm_hub[] = { 83 {} 84 }; 85 86 const struct nvkm_specdom 87 gf100_pm_gpc[] = { 88 { 0xe0, (const struct nvkm_specsig[]) { 89 { 0x00, "gpc00_l1_00", gf100_l1_sources }, 90 { 0x01, "gpc00_l1_01", gf100_l1_sources }, 91 { 0x02, "gpc00_l1_02", gf100_l1_sources }, 92 { 0x03, "gpc00_l1_03", gf100_l1_sources }, 93 { 0x05, "gpc00_l1_04", gf100_l1_sources }, 94 { 0x06, "gpc00_l1_05", gf100_l1_sources }, 95 { 0x0a, "gpc00_tex_00", gf100_tex_sources }, 96 { 0x0b, "gpc00_tex_01", gf100_tex_sources }, 97 { 0x0c, "gpc00_tex_02", gf100_tex_sources }, 98 { 0x0d, "gpc00_tex_03", gf100_tex_sources }, 99 { 0x0e, "gpc00_tex_04", gf100_tex_sources }, 100 { 0x0f, "gpc00_tex_05", gf100_tex_sources }, 101 { 0x10, "gpc00_tex_06", gf100_tex_sources }, 102 { 0x11, "gpc00_tex_07", gf100_tex_sources }, 103 { 0x12, "gpc00_tex_08", gf100_tex_sources }, 104 { 0x26, "gpc00_unk400_00", gf100_unk400_sources }, 105 {} 106 }, &gf100_perfctr_func }, 107 {} 108 }; 109 110 static const struct nvkm_specdom 111 gf100_pm_part[] = { 112 { 0xe0, (const struct nvkm_specsig[]) { 113 { 0x0f, "part00_pbfb_00", gf100_pbfb_sources }, 114 { 0x10, "part00_pbfb_01", gf100_pbfb_sources }, 115 { 0x21, "part00_pmfb_00", gf100_pmfb_sources }, 116 { 0x04, "part00_pmfb_01", gf100_pmfb_sources }, 117 { 0x00, "part00_pmfb_02", gf100_pmfb_sources }, 118 { 0x02, "part00_pmfb_03", gf100_pmfb_sources }, 119 { 0x01, "part00_pmfb_04", gf100_pmfb_sources }, 120 { 0x2e, "part00_pmfb_05", gf100_pmfb_sources }, 121 { 0x2f, "part00_pmfb_06", gf100_pmfb_sources }, 122 { 0x1b, "part00_pmfb_07", gf100_pmfb_sources }, 123 { 0x1c, "part00_pmfb_08", gf100_pmfb_sources }, 124 { 0x1d, "part00_pmfb_09", gf100_pmfb_sources }, 125 { 0x1e, "part00_pmfb_0a", gf100_pmfb_sources }, 126 { 0x1f, "part00_pmfb_0b", gf100_pmfb_sources }, 127 {} 128 }, &gf100_perfctr_func }, 129 {} 130 }; 131 132 static void 133 gf100_perfctr_init(struct nvkm_pm *pm, struct nvkm_perfdom *dom, 134 struct nvkm_perfctr *ctr) 135 { 136 struct nvkm_device *device = pm->engine.subdev.device; 137 u32 log = ctr->logic_op; 138 u32 src = 0x00000000; 139 int i; 140 141 for (i = 0; i < 4; i++) 142 src |= ctr->signal[i] << (i * 8); 143 144 nvkm_wr32(device, dom->addr + 0x09c, 0x00040002 | (dom->mode << 3)); 145 nvkm_wr32(device, dom->addr + 0x100, 0x00000000); 146 nvkm_wr32(device, dom->addr + 0x040 + (ctr->slot * 0x08), src); 147 nvkm_wr32(device, dom->addr + 0x044 + (ctr->slot * 0x08), log); 148 } 149 150 static void 151 gf100_perfctr_read(struct nvkm_pm *pm, struct nvkm_perfdom *dom, 152 struct nvkm_perfctr *ctr) 153 { 154 struct nvkm_device *device = pm->engine.subdev.device; 155 156 switch (ctr->slot) { 157 case 0: ctr->ctr = nvkm_rd32(device, dom->addr + 0x08c); break; 158 case 1: ctr->ctr = nvkm_rd32(device, dom->addr + 0x088); break; 159 case 2: ctr->ctr = nvkm_rd32(device, dom->addr + 0x080); break; 160 case 3: ctr->ctr = nvkm_rd32(device, dom->addr + 0x090); break; 161 } 162 dom->clk = nvkm_rd32(device, dom->addr + 0x070); 163 } 164 165 static void 166 gf100_perfctr_next(struct nvkm_pm *pm, struct nvkm_perfdom *dom) 167 { 168 struct nvkm_device *device = pm->engine.subdev.device; 169 nvkm_wr32(device, dom->addr + 0x06c, dom->signal_nr - 0x40 + 0x27); 170 nvkm_wr32(device, dom->addr + 0x0ec, 0x00000011); 171 } 172 173 const struct nvkm_funcdom 174 gf100_perfctr_func = { 175 .init = gf100_perfctr_init, 176 .read = gf100_perfctr_read, 177 .next = gf100_perfctr_next, 178 }; 179 180 static void 181 gf100_pm_fini(struct nvkm_pm *pm) 182 { 183 struct nvkm_device *device = pm->engine.subdev.device; 184 nvkm_mask(device, 0x000200, 0x10000000, 0x00000000); 185 nvkm_mask(device, 0x000200, 0x10000000, 0x10000000); 186 } 187 188 static const struct nvkm_pm_func 189 gf100_pm_ = { 190 .fini = gf100_pm_fini, 191 }; 192 193 int 194 gf100_pm_new_(const struct gf100_pm_func *func, struct nvkm_device *device, 195 int index, struct nvkm_pm **ppm) 196 { 197 struct nvkm_pm *pm; 198 u32 mask; 199 int ret; 200 201 if (!(pm = *ppm = kzalloc(sizeof(*pm), GFP_KERNEL))) 202 return -ENOMEM; 203 204 ret = nvkm_pm_ctor(&gf100_pm_, device, index, pm); 205 if (ret) 206 return ret; 207 208 /* HUB */ 209 ret = nvkm_perfdom_new(pm, "hub", 0, 0x1b0000, 0, 0x200, 210 func->doms_hub); 211 if (ret) 212 return ret; 213 214 /* GPC */ 215 mask = (1 << nvkm_rd32(device, 0x022430)) - 1; 216 mask &= ~nvkm_rd32(device, 0x022504); 217 mask &= ~nvkm_rd32(device, 0x022584); 218 219 ret = nvkm_perfdom_new(pm, "gpc", mask, 0x180000, 220 0x1000, 0x200, func->doms_gpc); 221 if (ret) 222 return ret; 223 224 /* PART */ 225 mask = (1 << nvkm_rd32(device, 0x022438)) - 1; 226 mask &= ~nvkm_rd32(device, 0x022548); 227 mask &= ~nvkm_rd32(device, 0x0225c8); 228 229 ret = nvkm_perfdom_new(pm, "part", mask, 0x1a0000, 230 0x1000, 0x200, func->doms_part); 231 if (ret) 232 return ret; 233 234 return 0; 235 } 236 237 static const struct gf100_pm_func 238 gf100_pm = { 239 .doms_gpc = gf100_pm_gpc, 240 .doms_hub = gf100_pm_hub, 241 .doms_part = gf100_pm_part, 242 }; 243 244 int 245 gf100_pm_new(struct nvkm_device *device, int index, struct nvkm_pm **ppm) 246 { 247 return gf100_pm_new_(&gf100_pm, device, index, ppm); 248 } 249
Indexes created Tue Sep 30 07:10:03 GMT 2025