1 /* $NetBSD: nouveau_nvkm_engine_gr_gf108.c,v 1.3 2021/12/18 23:45:36 riastradh Exp $ */ 2 3 /* 4 * Copyright 2013 Red Hat Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: Ben Skeggs <bskeggs (at) redhat.com> 25 */ 26 #include <sys/cdefs.h> 27 __KERNEL_RCSID(0, "$NetBSD: nouveau_nvkm_engine_gr_gf108.c,v 1.3 2021/12/18 23:45:36 riastradh Exp $"); 28 29 #include "gf100.h" 30 #include "ctxgf100.h" 31 32 #include <nvif/class.h> 33 34 /******************************************************************************* 35 * PGRAPH register lists 36 ******************************************************************************/ 37 38 const struct gf100_gr_init 39 gf108_gr_init_gpc_unk_0[] = { 40 { 0x418604, 1, 0x04, 0x00000000 }, 41 { 0x418680, 1, 0x04, 0x00000000 }, 42 { 0x418714, 1, 0x04, 0x00000000 }, 43 { 0x418384, 1, 0x04, 0x00000000 }, 44 {} 45 }; 46 47 const struct gf100_gr_init 48 gf108_gr_init_setup_1[] = { 49 { 0x4188c8, 2, 0x04, 0x00000000 }, 50 { 0x4188d0, 1, 0x04, 0x00010000 }, 51 { 0x4188d4, 1, 0x04, 0x00000001 }, 52 {} 53 }; 54 55 static const struct gf100_gr_init 56 gf108_gr_init_gpc_unk_1[] = { 57 { 0x418d00, 1, 0x04, 0x00000000 }, 58 { 0x418f08, 1, 0x04, 0x00000000 }, 59 { 0x418e00, 1, 0x04, 0x00000003 }, 60 { 0x418e08, 1, 0x04, 0x00000000 }, 61 {} 62 }; 63 64 static const struct gf100_gr_init 65 gf108_gr_init_pe_0[] = { 66 { 0x41980c, 1, 0x04, 0x00000010 }, 67 { 0x419810, 1, 0x04, 0x00000000 }, 68 { 0x419814, 1, 0x04, 0x00000004 }, 69 { 0x419844, 1, 0x04, 0x00000000 }, 70 { 0x41984c, 1, 0x04, 0x00005bc5 }, 71 { 0x419850, 4, 0x04, 0x00000000 }, 72 { 0x419880, 1, 0x04, 0x00000002 }, 73 {} 74 }; 75 76 static const struct gf100_gr_pack 77 gf108_gr_pack_mmio[] = { 78 { gf100_gr_init_main_0 }, 79 { gf100_gr_init_fe_0 }, 80 { gf100_gr_init_pri_0 }, 81 { gf100_gr_init_rstr2d_0 }, 82 { gf100_gr_init_pd_0 }, 83 { gf104_gr_init_ds_0 }, 84 { gf100_gr_init_scc_0 }, 85 { gf100_gr_init_prop_0 }, 86 { gf108_gr_init_gpc_unk_0 }, 87 { gf100_gr_init_setup_0 }, 88 { gf100_gr_init_crstr_0 }, 89 { gf108_gr_init_setup_1 }, 90 { gf100_gr_init_zcull_0 }, 91 { gf100_gr_init_gpm_0 }, 92 { gf108_gr_init_gpc_unk_1 }, 93 { gf100_gr_init_gcc_0 }, 94 { gf100_gr_init_tpccs_0 }, 95 { gf104_gr_init_tex_0 }, 96 { gf108_gr_init_pe_0 }, 97 { gf100_gr_init_l1c_0 }, 98 { gf100_gr_init_wwdx_0 }, 99 { gf100_gr_init_tpccs_1 }, 100 { gf100_gr_init_mpc_0 }, 101 { gf104_gr_init_sm_0 }, 102 { gf100_gr_init_be_0 }, 103 { gf100_gr_init_fe_1 }, 104 {} 105 }; 106 107 /******************************************************************************* 108 * PGRAPH engine/subdev functions 109 ******************************************************************************/ 110 111 static void 112 gf108_gr_init_r405a14(struct gf100_gr *gr) 113 { 114 nvkm_wr32(gr->base.engine.subdev.device, 0x405a14, 0x80000000); 115 } 116 117 static const struct gf100_gr_func 118 gf108_gr = { 119 .oneinit_tiles = gf100_gr_oneinit_tiles, 120 .oneinit_sm_id = gf100_gr_oneinit_sm_id, 121 .init = gf100_gr_init, 122 .init_gpc_mmu = gf100_gr_init_gpc_mmu, 123 .init_r405a14 = gf108_gr_init_r405a14, 124 .init_vsc_stream_master = gf100_gr_init_vsc_stream_master, 125 .init_zcull = gf100_gr_init_zcull, 126 .init_num_active_ltcs = gf100_gr_init_num_active_ltcs, 127 .init_fecs_exceptions = gf100_gr_init_fecs_exceptions, 128 .init_40601c = gf100_gr_init_40601c, 129 .init_419cc0 = gf100_gr_init_419cc0, 130 .init_419eb4 = gf100_gr_init_419eb4, 131 .init_tex_hww_esr = gf100_gr_init_tex_hww_esr, 132 .init_shader_exceptions = gf100_gr_init_shader_exceptions, 133 .init_400054 = gf100_gr_init_400054, 134 .trap_mp = gf100_gr_trap_mp, 135 .mmio = gf108_gr_pack_mmio, 136 .fecs.ucode = &gf100_gr_fecs_ucode, 137 .gpccs.ucode = &gf100_gr_gpccs_ucode, 138 .rops = gf100_gr_rops, 139 .grctx = &gf108_grctx, 140 .zbc = &gf100_gr_zbc, 141 .sclass = { 142 { -1, -1, FERMI_TWOD_A }, 143 { -1, -1, FERMI_MEMORY_TO_MEMORY_FORMAT_A }, 144 { -1, -1, FERMI_A, &gf100_fermi }, 145 { -1, -1, FERMI_B, &gf100_fermi }, 146 { -1, -1, FERMI_COMPUTE_A }, 147 {} 148 } 149 }; 150 151 const struct gf100_gr_fwif 152 gf108_gr_fwif[] = { 153 { -1, gf100_gr_load, &gf108_gr }, 154 { -1, gf100_gr_nofw, &gf108_gr }, 155 {} 156 }; 157 158 int 159 gf108_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr) 160 { 161 return gf100_gr_new_(gf108_gr_fwif, device, index, pgr); 162 } 163
Indexes created Mon Sep 22 05:09:51 GMT 2025