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      1 /*	$NetBSD: nouveau_nvkm_subdev_therm_gk104.c,v 1.2 2021/12/18 23:45:41 riastradh Exp $	*/
      2 
      3 /*
      4  * Copyright 2018 Red Hat Inc.
      5  *
      6  * Permission is hereby granted, free of charge, to any person obtaining a
      7  * copy of this software and associated documentation files (the "Software"),
      8  * to deal in the Software without restriction, including without limitation
      9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
     10  * and/or sell copies of the Software, and to permit persons to whom the
     11  * Software is furnished to do so, subject to the following conditions:
     12  *
     13  * The above copyright notice and this permission notice shall be included in
     14  * all copies or substantial portions of the Software.
     15  *
     16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     22  * OTHER DEALINGS IN THE SOFTWARE.
     23  *
     24  * Authors: Lyude Paul
     25  */
     26 #include <sys/cdefs.h>
     27 __KERNEL_RCSID(0, "$NetBSD: nouveau_nvkm_subdev_therm_gk104.c,v 1.2 2021/12/18 23:45:41 riastradh Exp $");
     28 
     29 #include <core/device.h>
     30 
     31 #include "priv.h"
     32 #include "gk104.h"
     33 
     34 void
     35 gk104_clkgate_enable(struct nvkm_therm *base)
     36 {
     37 	struct gk104_therm *therm = gk104_therm(base);
     38 	struct nvkm_device *dev = therm->base.subdev.device;
     39 	const struct gk104_clkgate_engine_info *order = therm->clkgate_order;
     40 	int i;
     41 
     42 	/* Program ENG_MANT, ENG_FILTER */
     43 	for (i = 0; order[i].engine != NVKM_SUBDEV_NR; i++) {
     44 		if (!nvkm_device_subdev(dev, order[i].engine))
     45 			continue;
     46 
     47 		nvkm_mask(dev, 0x20200 + order[i].offset, 0xff00, 0x4500);
     48 	}
     49 
     50 	/* magic */
     51 	nvkm_wr32(dev, 0x020288, therm->idle_filter->fecs);
     52 	nvkm_wr32(dev, 0x02028c, therm->idle_filter->hubmmu);
     53 
     54 	/* Enable clockgating (ENG_CLK = RUN->AUTO) */
     55 	for (i = 0; order[i].engine != NVKM_SUBDEV_NR; i++) {
     56 		if (!nvkm_device_subdev(dev, order[i].engine))
     57 			continue;
     58 
     59 		nvkm_mask(dev, 0x20200 + order[i].offset, 0x00ff, 0x0045);
     60 	}
     61 }
     62 
     63 void
     64 gk104_clkgate_fini(struct nvkm_therm *base, bool suspend)
     65 {
     66 	struct gk104_therm *therm = gk104_therm(base);
     67 	struct nvkm_device *dev = therm->base.subdev.device;
     68 	const struct gk104_clkgate_engine_info *order = therm->clkgate_order;
     69 	int i;
     70 
     71 	/* ENG_CLK = AUTO->RUN, ENG_PWR = RUN->AUTO */
     72 	for (i = 0; order[i].engine != NVKM_SUBDEV_NR; i++) {
     73 		if (!nvkm_device_subdev(dev, order[i].engine))
     74 			continue;
     75 
     76 		nvkm_mask(dev, 0x20200 + order[i].offset, 0xff, 0x54);
     77 	}
     78 }
     79 
     80 const struct gk104_clkgate_engine_info gk104_clkgate_engine_info[] = {
     81 	{ NVKM_ENGINE_GR,     0x00 },
     82 	{ NVKM_ENGINE_MSPDEC, 0x04 },
     83 	{ NVKM_ENGINE_MSPPP,  0x08 },
     84 	{ NVKM_ENGINE_MSVLD,  0x0c },
     85 	{ NVKM_ENGINE_CE0,    0x10 },
     86 	{ NVKM_ENGINE_CE1,    0x14 },
     87 	{ NVKM_ENGINE_MSENC,  0x18 },
     88 	{ NVKM_ENGINE_CE2,    0x1c },
     89 	{ NVKM_SUBDEV_NR, 0 },
     90 };
     91 
     92 const struct gf100_idle_filter gk104_idle_filter = {
     93 	.fecs = 0x00001000,
     94 	.hubmmu = 0x00001000,
     95 };
     96 
     97 static const struct nvkm_therm_func
     98 gk104_therm_func = {
     99 	.init = gf119_therm_init,
    100 	.fini = g84_therm_fini,
    101 	.pwm_ctrl = gf119_fan_pwm_ctrl,
    102 	.pwm_get = gf119_fan_pwm_get,
    103 	.pwm_set = gf119_fan_pwm_set,
    104 	.pwm_clock = gf119_fan_pwm_clock,
    105 	.temp_get = g84_temp_get,
    106 	.fan_sense = gt215_therm_fan_sense,
    107 	.program_alarms = nvkm_therm_program_alarms_polling,
    108 	.clkgate_init = gf100_clkgate_init,
    109 	.clkgate_enable = gk104_clkgate_enable,
    110 	.clkgate_fini = gk104_clkgate_fini,
    111 };
    112 
    113 static int
    114 gk104_therm_new_(const struct nvkm_therm_func *func,
    115 		 struct nvkm_device *device,
    116 		 int index,
    117 		 const struct gk104_clkgate_engine_info *clkgate_order,
    118 		 const struct gf100_idle_filter *idle_filter,
    119 		 struct nvkm_therm **ptherm)
    120 {
    121 	struct gk104_therm *therm = kzalloc(sizeof(*therm), GFP_KERNEL);
    122 
    123 	if (!therm)
    124 		return -ENOMEM;
    125 
    126 	nvkm_therm_ctor(&therm->base, device, index, func);
    127 	*ptherm = &therm->base;
    128 	therm->clkgate_order = clkgate_order;
    129 	therm->idle_filter = idle_filter;
    130 
    131 	return 0;
    132 }
    133 
    134 int
    135 gk104_therm_new(struct nvkm_device *device,
    136 		int index, struct nvkm_therm **ptherm)
    137 {
    138 	return gk104_therm_new_(&gk104_therm_func, device, index,
    139 				gk104_clkgate_engine_info, &gk104_idle_filter,
    140 				ptherm);
    141 }
    142