1 /* $NetBSD: nouveau_nvkm_engine_disp_sorgm200.c,v 1.3 2024/06/27 12:21:20 hannken Exp $ */ 2 3 /* 4 * Copyright 2012 Red Hat Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: Ben Skeggs 25 */ 26 #include <sys/cdefs.h> 27 __KERNEL_RCSID(0, "$NetBSD: nouveau_nvkm_engine_disp_sorgm200.c,v 1.3 2024/06/27 12:21:20 hannken Exp $"); 28 29 #include "ior.h" 30 31 void 32 gm200_sor_dp_drive(struct nvkm_ior *sor, int ln, int pc, int dc, int pe, int pu) 33 { 34 struct nvkm_device *device = sor->disp->engine.subdev.device; 35 const u32 loff = nv50_sor_link(sor); 36 const u32 shift = sor->func->dp.lanes[ln] * 8; 37 u32 data[4]; 38 39 pu &= 0x0f; 40 41 data[0] = nvkm_rd32(device, 0x61c118 + loff) & ~(0x000000ff << shift); 42 data[1] = nvkm_rd32(device, 0x61c120 + loff) & ~(0x000000ff << shift); 43 data[2] = nvkm_rd32(device, 0x61c130 + loff); 44 if ((data[2] & 0x00000f00) < (pu << 8) || ln == 0) 45 data[2] = (data[2] & ~0x00000f00) | (pu << 8); 46 nvkm_wr32(device, 0x61c118 + loff, data[0] | (dc << shift)); 47 nvkm_wr32(device, 0x61c120 + loff, data[1] | (pe << shift)); 48 nvkm_wr32(device, 0x61c130 + loff, data[2]); 49 data[3] = nvkm_rd32(device, 0x61c13c + loff) & ~(0x000000ff << shift); 50 nvkm_wr32(device, 0x61c13c + loff, data[3] | (pc << shift)); 51 } 52 53 void 54 gm200_sor_route_set(struct nvkm_outp *outp, struct nvkm_ior *ior) 55 { 56 struct nvkm_device *device = outp->disp->engine.subdev.device; 57 const u32 moff = __ffs(outp->info.or) * 0x100; 58 const u32 sor = ior ? ior->id + 1 : 0; 59 u32 link = ior ? (ior->asy.link == 2) : 0; 60 61 if (outp->info.sorconf.link & 1) { 62 nvkm_mask(device, 0x612308 + moff, 0x0000001f, link << 4 | sor); 63 link++; 64 } 65 66 if (outp->info.sorconf.link & 2) 67 nvkm_mask(device, 0x612388 + moff, 0x0000001f, link << 4 | sor); 68 } 69 70 int 71 gm200_sor_route_get(struct nvkm_outp *outp, int *link) 72 { 73 struct nvkm_device *device = outp->disp->engine.subdev.device; 74 const int sublinks = outp->info.sorconf.link; 75 int lnk[2], sor[2], m, s; 76 77 sor[0] = sor[1] = 0; /* GCC 12.3 maybe-uninitialized */ 78 for (*link = 0, m = __ffs(outp->info.or) * 2, s = 0; s < 2; m++, s++) { 79 if (sublinks & BIT(s)) { 80 u32 data = nvkm_rd32(device, 0x612308 + (m * 0x80)); 81 lnk[s] = (data & 0x00000010) >> 4; 82 sor[s] = (data & 0x0000000f); 83 if (!sor[s]) 84 return -1; 85 *link |= lnk[s]; 86 } 87 } 88 89 if (sublinks == 3) { 90 if (sor[0] != sor[1] || WARN_ON(lnk[0] || !lnk[1])) 91 return -1; 92 } 93 94 return ((sublinks & 1) ? sor[0] : sor[1]) - 1; 95 } 96 97 static const struct nvkm_ior_func 98 gm200_sor = { 99 .route = { 100 .get = gm200_sor_route_get, 101 .set = gm200_sor_route_set, 102 }, 103 .state = gf119_sor_state, 104 .power = nv50_sor_power, 105 .clock = gf119_sor_clock, 106 .hdmi = { 107 .ctrl = gk104_hdmi_ctrl, 108 .scdc = gm200_hdmi_scdc, 109 }, 110 .dp = { 111 .lanes = { 0, 1, 2, 3 }, 112 .links = gf119_sor_dp_links, 113 .power = g94_sor_dp_power, 114 .pattern = gm107_sor_dp_pattern, 115 .drive = gm200_sor_dp_drive, 116 .vcpi = gf119_sor_dp_vcpi, 117 .audio = gf119_sor_dp_audio, 118 .audio_sym = gf119_sor_dp_audio_sym, 119 .watermark = gf119_sor_dp_watermark, 120 }, 121 .hda = { 122 .hpd = gf119_hda_hpd, 123 .eld = gf119_hda_eld, 124 }, 125 }; 126 127 int 128 gm200_sor_new(struct nvkm_disp *disp, int id) 129 { 130 return nvkm_ior_new_(&gm200_sor, disp, SOR, id); 131 } 132