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    Searched defs:gmbus (Results 1 - 2 of 2) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/i915/gvt/
edid.h 70 * States of GMBUS
72 * GMBUS0-3 could be related to the EDID virtualization. Another two GMBUS
74 * not considered here. Below describes the usage of GMBUS registers that are
100 * are invisible to GMBUS MMIO interface. So no definitions
129 * GMBUS and AUX_CH sequences cannot interleave.
139 struct intel_vgpu_i2c_gmbus gmbus; member in struct:intel_vgpu_i2c_edid
  /src/sys/external/bsd/drm2/dist/drm/i915/
i915_drv.h 950 struct intel_gmbus gmbus[GMBUS_NUM_PINS]; member in struct:drm_i915_private
952 /** gmbus_mutex protects against concurrent usage of the single hw gmbus
957 * Base address of where the gmbus and gpio blocks are located (either

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