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      1 /*	$NetBSD: nouveau_nvkm_engine_ce_gp100.c,v 1.2 2021/12/18 23:45:34 riastradh Exp $	*/
      2 
      3 /*
      4  * Copyright 2015 Red Hat Inc.
      5  *
      6  * Permission is hereby granted, free of charge, to any person obtaining a
      7  * copy of this software and associated documentation files (the "Software"),
      8  * to deal in the Software without restriction, including without limitation
      9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
     10  * and/or sell copies of the Software, and to permit persons to whom the
     11  * Software is furnished to do so, subject to the following conditions:
     12  *
     13  * The above copyright notice and this permission notice shall be included in
     14  * all copies or substantial portions of the Software.
     15  *
     16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     22  * OTHER DEALINGS IN THE SOFTWARE.
     23  *
     24  * Authors: Ben Skeggs
     25  */
     26 #include <sys/cdefs.h>
     27 __KERNEL_RCSID(0, "$NetBSD: nouveau_nvkm_engine_ce_gp100.c,v 1.2 2021/12/18 23:45:34 riastradh Exp $");
     28 
     29 #include "priv.h"
     30 #include <core/enum.h>
     31 
     32 #include <nvif/class.h>
     33 
     34 static const struct nvkm_enum
     35 gp100_ce_launcherr_report[] = {
     36 	{ 0x0, "NO_ERR" },
     37 	{ 0x1, "2D_LAYER_EXCEEDS_DEPTH" },
     38 	{ 0x2, "INVALID_ALIGNMENT" },
     39 	{ 0x3, "MEM2MEM_RECT_OUT_OF_BOUNDS" },
     40 	{ 0x4, "SRC_LINE_EXCEEDS_PITCH" },
     41 	{ 0x5, "SRC_LINE_EXCEEDS_NEG_PITCH" },
     42 	{ 0x6, "DST_LINE_EXCEEDS_PITCH" },
     43 	{ 0x7, "DST_LINE_EXCEEDS_NEG_PITCH" },
     44 	{ 0x8, "BAD_SRC_PIXEL_COMP_REF" },
     45 	{ 0x9, "INVALID_VALUE" },
     46 	{ 0xa, "UNUSED_FIELD" },
     47 	{ 0xb, "INVALID_OPERATION" },
     48 	{ 0xc, "NO_RESOURCES" },
     49 	{ 0xd, "INVALID_CONFIG" },
     50 	{}
     51 };
     52 
     53 static void
     54 gp100_ce_intr_launcherr(struct nvkm_engine *ce, const u32 base)
     55 {
     56 	struct nvkm_subdev *subdev = &ce->subdev;
     57 	struct nvkm_device *device = subdev->device;
     58 	u32 stat = nvkm_rd32(device, 0x104418 + base);
     59 	const struct nvkm_enum *en =
     60 		nvkm_enum_find(gp100_ce_launcherr_report, stat & 0x0000000f);
     61 	nvkm_warn(subdev, "LAUNCHERR %08x [%s]\n", stat, en ? en->name : "");
     62 }
     63 
     64 void
     65 gp100_ce_intr(struct nvkm_engine *ce)
     66 {
     67 	const u32 base = (ce->subdev.index - NVKM_ENGINE_CE0) * 0x80;
     68 	struct nvkm_subdev *subdev = &ce->subdev;
     69 	struct nvkm_device *device = subdev->device;
     70 	u32 mask = nvkm_rd32(device, 0x10440c + base);
     71 	u32 intr = nvkm_rd32(device, 0x104410 + base) & mask;
     72 	if (intr & 0x00000001) { //XXX: guess
     73 		nvkm_warn(subdev, "BLOCKPIPE\n");
     74 		nvkm_wr32(device, 0x104410 + base, 0x00000001);
     75 		intr &= ~0x00000001;
     76 	}
     77 	if (intr & 0x00000002) { //XXX: guess
     78 		nvkm_warn(subdev, "NONBLOCKPIPE\n");
     79 		nvkm_wr32(device, 0x104410 + base, 0x00000002);
     80 		intr &= ~0x00000002;
     81 	}
     82 	if (intr & 0x00000004) {
     83 		gp100_ce_intr_launcherr(ce, base);
     84 		nvkm_wr32(device, 0x104410 + base, 0x00000004);
     85 		intr &= ~0x00000004;
     86 	}
     87 	if (intr) {
     88 		nvkm_warn(subdev, "intr %08x\n", intr);
     89 		nvkm_wr32(device, 0x104410 + base, intr);
     90 	}
     91 }
     92 
     93 static const struct nvkm_engine_func
     94 gp100_ce = {
     95 	.intr = gp100_ce_intr,
     96 	.sclass = {
     97 		{ -1, -1, PASCAL_DMA_COPY_A },
     98 		{}
     99 	}
    100 };
    101 
    102 int
    103 gp100_ce_new(struct nvkm_device *device, int index,
    104 	     struct nvkm_engine **pengine)
    105 {
    106 	return nvkm_engine_new_(&gp100_ce, device, index, true, pengine);
    107 }
    108