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      1 /*	$NetBSD: nouveau_nvkm_engine_fifo_gp100.c,v 1.2 2021/12/18 23:45:35 riastradh Exp $	*/
      2 
      3 /*
      4  * Copyright 2016 Red Hat Inc.
      5  *
      6  * Permission is hereby granted, free of charge, to any person obtaining a
      7  * copy of this software and associated documentation files (the "Software"),
      8  * to deal in the Software without restriction, including without limitation
      9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
     10  * and/or sell copies of the Software, and to permit persons to whom the
     11  * Software is furnished to do so, subject to the following conditions:
     12  *
     13  * The above copyright notice and this permission notice shall be included in
     14  * all copies or substantial portions of the Software.
     15  *
     16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     22  * OTHER DEALINGS IN THE SOFTWARE.
     23  *
     24  * Authors: Ben Skeggs
     25  */
     26 #include <sys/cdefs.h>
     27 __KERNEL_RCSID(0, "$NetBSD: nouveau_nvkm_engine_fifo_gp100.c,v 1.2 2021/12/18 23:45:35 riastradh Exp $");
     28 
     29 #include "gk104.h"
     30 #include "changk104.h"
     31 
     32 #include <subdev/fault.h>
     33 
     34 #include <nvif/class.h>
     35 
     36 const struct nvkm_enum
     37 gp100_fifo_fault_engine[] = {
     38 	{ 0x01, "DISPLAY" },
     39 	{ 0x03, "IFB", NULL, NVKM_ENGINE_IFB },
     40 	{ 0x04, "BAR1", NULL, NVKM_SUBDEV_BAR },
     41 	{ 0x05, "BAR2", NULL, NVKM_SUBDEV_INSTMEM },
     42 	{ 0x06, "HOST0", NULL, NVKM_ENGINE_FIFO },
     43 	{ 0x07, "HOST1", NULL, NVKM_ENGINE_FIFO },
     44 	{ 0x08, "HOST2", NULL, NVKM_ENGINE_FIFO },
     45 	{ 0x09, "HOST3", NULL, NVKM_ENGINE_FIFO },
     46 	{ 0x0a, "HOST4", NULL, NVKM_ENGINE_FIFO },
     47 	{ 0x0b, "HOST5", NULL, NVKM_ENGINE_FIFO },
     48 	{ 0x0c, "HOST6", NULL, NVKM_ENGINE_FIFO },
     49 	{ 0x0d, "HOST7", NULL, NVKM_ENGINE_FIFO },
     50 	{ 0x0e, "HOST8", NULL, NVKM_ENGINE_FIFO },
     51 	{ 0x0f, "HOST9", NULL, NVKM_ENGINE_FIFO },
     52 	{ 0x10, "HOST10", NULL, NVKM_ENGINE_FIFO },
     53 	{ 0x13, "PERF" },
     54 	{ 0x17, "PMU" },
     55 	{ 0x18, "PTP" },
     56 	{ 0x1f, "PHYSICAL" },
     57 	{}
     58 };
     59 
     60 void
     61 gp100_fifo_intr_fault(struct nvkm_fifo *fifo, int unit)
     62 {
     63 	struct nvkm_device *device = fifo->engine.subdev.device;
     64 	u32 inst = nvkm_rd32(device, 0x002800 + (unit * 0x10));
     65 	u32 valo = nvkm_rd32(device, 0x002804 + (unit * 0x10));
     66 	u32 vahi = nvkm_rd32(device, 0x002808 + (unit * 0x10));
     67 	u32 type = nvkm_rd32(device, 0x00280c + (unit * 0x10));
     68 	struct nvkm_fault_data info;
     69 
     70 	info.inst   =  (u64)inst << 12;
     71 	info.addr   = ((u64)vahi << 32) | valo;
     72 	info.time   = 0;
     73 	info.engine = unit;
     74 	info.valid  = 1;
     75 	info.gpc    = (type & 0x1f000000) >> 24;
     76 	info.hub    = (type & 0x00100000) >> 20;
     77 	info.access = (type & 0x00070000) >> 16;
     78 	info.client = (type & 0x00007f00) >> 8;
     79 	info.reason = (type & 0x0000001f);
     80 
     81 	nvkm_fifo_fault(fifo, &info);
     82 }
     83 
     84 static const struct gk104_fifo_func
     85 gp100_fifo = {
     86 	.intr.fault = gp100_fifo_intr_fault,
     87 	.pbdma = &gm200_fifo_pbdma,
     88 	.fault.access = gk104_fifo_fault_access,
     89 	.fault.engine = gp100_fifo_fault_engine,
     90 	.fault.reason = gk104_fifo_fault_reason,
     91 	.fault.hubclient = gk104_fifo_fault_hubclient,
     92 	.fault.gpcclient = gk104_fifo_fault_gpcclient,
     93 	.runlist = &gm107_fifo_runlist,
     94 	.chan = {{0,0,PASCAL_CHANNEL_GPFIFO_A}, gk104_fifo_gpfifo_new },
     95 	.cgrp_force = true,
     96 };
     97 
     98 int
     99 gp100_fifo_new(struct nvkm_device *device, int index, struct nvkm_fifo **pfifo)
    100 {
    101 	return gk104_fifo_new_(&gp100_fifo, device, index, 4096, pfifo);
    102 }
    103