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      1 /*	$NetBSD: nouveau_nvkm_engine_disp_hdmigt215.c,v 1.3 2021/12/18 23:45:35 riastradh Exp $	*/
      2 
      3 /*
      4  * Copyright 2012 Red Hat Inc.
      5  *
      6  * Permission is hereby granted, free of charge, to any person obtaining a
      7  * copy of this software and associated documentation files (the "Software"),
      8  * to deal in the Software without restriction, including without limitation
      9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
     10  * and/or sell copies of the Software, and to permit persons to whom the
     11  * Software is furnished to do so, subject to the following conditions:
     12  *
     13  * The above copyright notice and this permission notice shall be included in
     14  * all copies or substantial portions of the Software.
     15  *
     16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     22  * OTHER DEALINGS IN THE SOFTWARE.
     23  *
     24  * Authors: Ben Skeggs
     25  */
     26 #include <sys/cdefs.h>
     27 __KERNEL_RCSID(0, "$NetBSD: nouveau_nvkm_engine_disp_hdmigt215.c,v 1.3 2021/12/18 23:45:35 riastradh Exp $");
     28 
     29 #include "hdmi.h"
     30 
     31 void
     32 gt215_hdmi_ctrl(struct nvkm_ior *ior, int head, bool enable, u8 max_ac_packet,
     33 		u8 rekey, u8 *avi, u8 avi_size, u8 *vendor, u8 vendor_size)
     34 {
     35 	struct nvkm_device *device = ior->disp->engine.subdev.device;
     36 	const u32 ctrl = 0x40000000 * enable |
     37 			 0x1f000000 /* ??? */ |
     38 			 max_ac_packet << 16 |
     39 			 rekey;
     40 	const u32 soff = nv50_ior_base(ior);
     41 	struct packed_hdmi_infoframe avi_infoframe;
     42 	struct packed_hdmi_infoframe vendor_infoframe;
     43 
     44 	pack_hdmi_infoframe(&avi_infoframe, avi, avi_size);
     45 	pack_hdmi_infoframe(&vendor_infoframe, vendor, vendor_size);
     46 
     47 	if (!(ctrl & 0x40000000)) {
     48 		nvkm_mask(device, 0x61c5a4 + soff, 0x40000000, 0x00000000);
     49 		nvkm_mask(device, 0x61c53c + soff, 0x00000001, 0x00000000);
     50 		nvkm_mask(device, 0x61c520 + soff, 0x00000001, 0x00000000);
     51 		nvkm_mask(device, 0x61c500 + soff, 0x00000001, 0x00000000);
     52 		return;
     53 	}
     54 
     55 	/* AVI InfoFrame */
     56 	nvkm_mask(device, 0x61c520 + soff, 0x00000001, 0x00000000);
     57 	if (avi_size) {
     58 		nvkm_wr32(device, 0x61c528 + soff, avi_infoframe.header);
     59 		nvkm_wr32(device, 0x61c52c + soff, avi_infoframe.subpack0_low);
     60 		nvkm_wr32(device, 0x61c530 + soff, avi_infoframe.subpack0_high);
     61 		nvkm_wr32(device, 0x61c534 + soff, avi_infoframe.subpack1_low);
     62 		nvkm_wr32(device, 0x61c538 + soff, avi_infoframe.subpack1_high);
     63 		nvkm_mask(device, 0x61c520 + soff, 0x00000001, 0x00000001);
     64 	}
     65 
     66 	/* Audio InfoFrame */
     67 	nvkm_mask(device, 0x61c500 + soff, 0x00000001, 0x00000000);
     68 	nvkm_wr32(device, 0x61c508 + soff, 0x000a0184);
     69 	nvkm_wr32(device, 0x61c50c + soff, 0x00000071);
     70 	nvkm_wr32(device, 0x61c510 + soff, 0x00000000);
     71 	nvkm_mask(device, 0x61c500 + soff, 0x00000001, 0x00000001);
     72 
     73 	/* Vendor InfoFrame */
     74 	nvkm_mask(device, 0x61c53c + soff, 0x00010001, 0x00010000);
     75 	if (vendor_size) {
     76 		nvkm_wr32(device, 0x61c544 + soff, vendor_infoframe.header);
     77 		nvkm_wr32(device, 0x61c548 + soff, vendor_infoframe.subpack0_low);
     78 		nvkm_wr32(device, 0x61c54c + soff, vendor_infoframe.subpack0_high);
     79 		/* Is there a second (or up to fourth?) set of subpack registers here? */
     80 		/* nvkm_wr32(device, 0x61c550 + soff, vendor_infoframe.subpack1_low); */
     81 		/* nvkm_wr32(device, 0x61c554 + soff, vendor_infoframe.subpack1_high); */
     82 		nvkm_mask(device, 0x61c53c + soff, 0x00010001, 0x00010001);
     83 	}
     84 
     85 	nvkm_mask(device, 0x61c5d0 + soff, 0x00070001, 0x00010001); /* SPARE, HW_CTS */
     86 	nvkm_mask(device, 0x61c568 + soff, 0x00010101, 0x00000000); /* ACR_CTRL, ?? */
     87 	nvkm_mask(device, 0x61c578 + soff, 0x80000000, 0x80000000); /* ACR_0441_ENABLE */
     88 
     89 	/* ??? */
     90 	nvkm_mask(device, 0x61733c, 0x00100000, 0x00100000); /* RESETF */
     91 	nvkm_mask(device, 0x61733c, 0x10000000, 0x10000000); /* LOOKUP_EN */
     92 	nvkm_mask(device, 0x61733c, 0x00100000, 0x00000000); /* !RESETF */
     93 
     94 	/* HDMI_CTRL */
     95 	nvkm_mask(device, 0x61c5a4 + soff, 0x5f1f007f, ctrl);
     96 }
     97