1 /* $NetBSD: nouveau_nvkm_engine_pm_gt215.c,v 1.3 2021/12/18 23:45:37 riastradh Exp $ */ 2 3 /* 4 * Copyright 2013 Red Hat Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: Ben Skeggs 25 */ 26 #include <sys/cdefs.h> 27 __KERNEL_RCSID(0, "$NetBSD: nouveau_nvkm_engine_pm_gt215.c,v 1.3 2021/12/18 23:45:37 riastradh Exp $"); 28 29 #include "nv40.h" 30 31 static const struct nvkm_specsrc 32 gt215_zcull_sources[] = { 33 { 0x402ca4, (const struct nvkm_specmux[]) { 34 { 0x7fff, 0, "unk0" }, 35 { 0xff, 24, "unk24" }, 36 {} 37 }, "pgraph_zcull_pm_unka4" }, 38 {} 39 }; 40 41 static const struct nvkm_specdom 42 gt215_pm[] = { 43 { 0x20, (const struct nvkm_specsig[]) { 44 {} 45 }, &nv40_perfctr_func }, 46 { 0xf0, (const struct nvkm_specsig[]) { 47 { 0xcb, "pc01_gr_idle" }, 48 { 0x86, "pc01_strmout_00" }, 49 { 0x87, "pc01_strmout_01" }, 50 { 0xe0, "pc01_trast_00" }, 51 { 0xe1, "pc01_trast_01" }, 52 { 0xe2, "pc01_trast_02" }, 53 { 0xe3, "pc01_trast_03" }, 54 { 0xe6, "pc01_trast_04" }, 55 { 0xe7, "pc01_trast_05" }, 56 { 0x84, "pc01_vattr_00" }, 57 { 0x85, "pc01_vattr_01" }, 58 { 0x46, "pc01_vfetch_00", g84_vfetch_sources }, 59 { 0x47, "pc01_vfetch_01", g84_vfetch_sources }, 60 { 0x48, "pc01_vfetch_02", g84_vfetch_sources }, 61 { 0x49, "pc01_vfetch_03", g84_vfetch_sources }, 62 { 0x4a, "pc01_vfetch_04", g84_vfetch_sources }, 63 { 0x4b, "pc01_vfetch_05", g84_vfetch_sources }, 64 { 0x4c, "pc01_vfetch_06", g84_vfetch_sources }, 65 { 0x4d, "pc01_vfetch_07", g84_vfetch_sources }, 66 { 0x4e, "pc01_vfetch_08", g84_vfetch_sources }, 67 { 0x4f, "pc01_vfetch_09", g84_vfetch_sources }, 68 { 0x50, "pc01_vfetch_0a", g84_vfetch_sources }, 69 { 0x51, "pc01_vfetch_0b", g84_vfetch_sources }, 70 { 0x52, "pc01_vfetch_0c", g84_vfetch_sources }, 71 { 0x53, "pc01_vfetch_0d", g84_vfetch_sources }, 72 { 0x54, "pc01_vfetch_0e", g84_vfetch_sources }, 73 { 0x55, "pc01_vfetch_0f", g84_vfetch_sources }, 74 { 0x56, "pc01_vfetch_10", g84_vfetch_sources }, 75 { 0x57, "pc01_vfetch_11", g84_vfetch_sources }, 76 { 0x58, "pc01_vfetch_12", g84_vfetch_sources }, 77 { 0x59, "pc01_vfetch_13", g84_vfetch_sources }, 78 { 0x5a, "pc01_vfetch_14", g84_vfetch_sources }, 79 { 0x5b, "pc01_vfetch_15", g84_vfetch_sources }, 80 { 0x5c, "pc01_vfetch_16", g84_vfetch_sources }, 81 { 0x5d, "pc01_vfetch_17", g84_vfetch_sources }, 82 { 0x5e, "pc01_vfetch_18", g84_vfetch_sources }, 83 { 0x5f, "pc01_vfetch_19", g84_vfetch_sources }, 84 { 0x07, "pc01_zcull_00", gt215_zcull_sources }, 85 { 0x08, "pc01_zcull_01", gt215_zcull_sources }, 86 { 0x09, "pc01_zcull_02", gt215_zcull_sources }, 87 { 0x0a, "pc01_zcull_03", gt215_zcull_sources }, 88 { 0x0b, "pc01_zcull_04", gt215_zcull_sources }, 89 { 0x0c, "pc01_zcull_05", gt215_zcull_sources }, 90 { 0xb2, "pc01_unk00" }, 91 { 0xec, "pc01_trailer" }, 92 {} 93 }, &nv40_perfctr_func }, 94 { 0xe0, (const struct nvkm_specsig[]) { 95 { 0x64, "pc02_crop_00", gt200_crop_sources }, 96 { 0x65, "pc02_crop_01", gt200_crop_sources }, 97 { 0x66, "pc02_crop_02", gt200_crop_sources }, 98 { 0x67, "pc02_crop_03", gt200_crop_sources }, 99 { 0x00, "pc02_prop_00", gt200_prop_sources }, 100 { 0x01, "pc02_prop_01", gt200_prop_sources }, 101 { 0x02, "pc02_prop_02", gt200_prop_sources }, 102 { 0x03, "pc02_prop_03", gt200_prop_sources }, 103 { 0x04, "pc02_prop_04", gt200_prop_sources }, 104 { 0x05, "pc02_prop_05", gt200_prop_sources }, 105 { 0x06, "pc02_prop_06", gt200_prop_sources }, 106 { 0x07, "pc02_prop_07", gt200_prop_sources }, 107 { 0x80, "pc02_tex_00", gt200_tex_sources }, 108 { 0x81, "pc02_tex_01", gt200_tex_sources }, 109 { 0x82, "pc02_tex_02", gt200_tex_sources }, 110 { 0x83, "pc02_tex_03", gt200_tex_sources }, 111 { 0x3a, "pc02_tex_04", gt200_tex_sources }, 112 { 0x3b, "pc02_tex_05", gt200_tex_sources }, 113 { 0x3c, "pc02_tex_06", gt200_tex_sources }, 114 { 0x7c, "pc02_zrop_00", nv50_zrop_sources }, 115 { 0x7d, "pc02_zrop_01", nv50_zrop_sources }, 116 { 0x7e, "pc02_zrop_02", nv50_zrop_sources }, 117 { 0x7f, "pc02_zrop_03", nv50_zrop_sources }, 118 { 0xcc, "pc02_trailer" }, 119 {} 120 }, &nv40_perfctr_func }, 121 { 0x20, (const struct nvkm_specsig[]) { 122 {} 123 }, &nv40_perfctr_func }, 124 { 0x20, (const struct nvkm_specsig[]) { 125 {} 126 }, &nv40_perfctr_func }, 127 { 0x20, (const struct nvkm_specsig[]) { 128 {} 129 }, &nv40_perfctr_func }, 130 { 0x20, (const struct nvkm_specsig[]) { 131 {} 132 }, &nv40_perfctr_func }, 133 { 0x20, (const struct nvkm_specsig[]) { 134 {} 135 }, &nv40_perfctr_func }, 136 {} 137 }; 138 139 int 140 gt215_pm_new(struct nvkm_device *device, int index, struct nvkm_pm **ppm) 141 { 142 return nv40_pm_new_(gt215_pm, device, index, ppm); 143 } 144
Indexes created Tue Sep 30 17:09:57 GMT 2025