1 /* $NetBSD: gttwsi_core.c,v 1.20 2025/09/25 13:44:31 thorpej Exp $ */ 2 /* 3 * Copyright (c) 2008 Eiji Kawauchi. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed for the NetBSD Project by 17 * Eiji Kawauchi. 18 * 4. The name of the author may not be used to endorse or promote products 19 * derived from this software without specific prior written permission 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 /* 33 * Copyright (c) 2005 Brocade Communcations, inc. 34 * All rights reserved. 35 * 36 * Written by Matt Thomas for Brocade Communcations, Inc. 37 * 38 * Redistribution and use in source and binary forms, with or without 39 * modification, are permitted provided that the following conditions 40 * are met: 41 * 1. Redistributions of source code must retain the above copyright 42 * notice, this list of conditions and the following disclaimer. 43 * 2. Redistributions in binary form must reproduce the above copyright 44 * notice, this list of conditions and the following disclaimer in the 45 * documentation and/or other materials provided with the distribution. 46 * 3. The name of Brocade Communications, Inc. may not be used to endorse 47 * or promote products derived from this software without specific prior 48 * written permission. 49 * 50 * THIS SOFTWARE IS PROVIDED BY BROCADE COMMUNICATIONS, INC. ``AS IS'' AND 51 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 52 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 53 * ARE DISCLAIMED. IN NO EVENT SHALL EITHER BROCADE COMMUNICATIONS, INC. BE 54 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 55 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 56 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 57 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 58 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 59 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 60 * OF THE POSSIBILITY OF SUCH DAMAGE. 61 */ 62 //#define TWSI_DEBUG 63 64 /* 65 * Marvell Two-Wire Serial Interface (aka I2C) master driver 66 */ 67 68 #include <sys/cdefs.h> 69 __KERNEL_RCSID(0, "$NetBSD: gttwsi_core.c,v 1.20 2025/09/25 13:44:31 thorpej Exp $"); 70 #include "locators.h" 71 72 #include <sys/param.h> 73 #include <sys/bus.h> 74 #include <sys/condvar.h> 75 #include <sys/device.h> 76 #include <sys/errno.h> 77 #include <sys/kernel.h> 78 #include <sys/mutex.h> 79 #include <sys/systm.h> 80 81 #include <dev/i2c/i2cvar.h> 82 83 #include <dev/i2c/gttwsireg.h> 84 #include <dev/i2c/gttwsivar.h> 85 86 static int gttwsi_send_start(void *v, int flags); 87 static int gttwsi_send_stop(void *v, int flags); 88 static int gttwsi_initiate_xfer(void *v, i2c_addr_t addr, int flags); 89 static int gttwsi_read_byte(void *v, uint8_t *valp, int flags); 90 static int gttwsi_write_byte(void *v, uint8_t val, int flags); 91 92 static int gttwsi_wait(struct gttwsi_softc *, uint32_t, uint32_t, 93 uint32_t, int, const char *); 94 95 uint32_t 96 gttwsi_read_4(struct gttwsi_softc *sc, uint32_t reg) 97 { 98 const uint32_t val = bus_space_read_4(sc->sc_bust, sc->sc_bush, 99 sc->sc_regmap[reg]); 100 #ifdef TWSI_DEBUG 101 printf("I2C:R:[%" PRIu32 "]%02" PRIxBUSSIZE ":%02" PRIx32 "\n", reg, sc->sc_regmap[reg], val); 102 #else 103 DELAY(TWSI_READ_DELAY); 104 #endif 105 return val; 106 } 107 108 void 109 gttwsi_write_4(struct gttwsi_softc *sc, uint32_t reg, uint32_t val) 110 { 111 112 bus_space_write_4(sc->sc_bust, sc->sc_bush, sc->sc_regmap[reg], val); 113 #ifdef TWSI_DEBUG 114 printf("I2C:W:[%" PRIu32 "]%02" PRIxBUSSIZE ":%02" PRIx32 "\n", reg, sc->sc_regmap[reg], val); 115 #else 116 DELAY(TWSI_WRITE_DELAY); 117 #endif 118 } 119 120 /* ARGSUSED */ 121 void 122 gttwsi_attach_subr(device_t self, bus_space_tag_t iot, bus_space_handle_t ioh, 123 const bus_size_t *regmap) 124 { 125 struct gttwsi_softc * const sc = device_private(self); 126 127 aprint_naive("\n"); 128 aprint_normal(": Marvell TWSI controller\n"); 129 130 sc->sc_dev = self; 131 sc->sc_bust = iot; 132 sc->sc_bush = ioh; 133 sc->sc_regmap = regmap; 134 135 mutex_init(&sc->sc_mtx, MUTEX_DEFAULT, IPL_BIO); 136 cv_init(&sc->sc_cv, device_xname(self)); 137 138 sc->sc_started = false; 139 iic_tag_init(&sc->sc_i2c); 140 sc->sc_i2c.ic_cookie = sc; 141 sc->sc_i2c.ic_send_start = gttwsi_send_start; 142 sc->sc_i2c.ic_send_stop = gttwsi_send_stop; 143 sc->sc_i2c.ic_initiate_xfer = gttwsi_initiate_xfer; 144 sc->sc_i2c.ic_read_byte = gttwsi_read_byte; 145 sc->sc_i2c.ic_write_byte = gttwsi_write_byte; 146 147 /* 148 * Put the controller into Soft Reset. 149 */ 150 /* reset */ 151 gttwsi_write_4(sc, TWSI_SOFTRESET, SOFTRESET_VAL); 152 } 153 154 void 155 gttwsi_config_children(device_t self) 156 { 157 struct gttwsi_softc * const sc = device_private(self); 158 159 iicbus_attach(self, &sc->sc_i2c); 160 } 161 162 int 163 gttwsi_intr(void *arg) 164 { 165 struct gttwsi_softc *sc = arg; 166 uint32_t val; 167 168 mutex_enter(&sc->sc_mtx); 169 val = gttwsi_read_4(sc, TWSI_CONTROL); 170 if (val & CONTROL_IFLG) { 171 gttwsi_write_4(sc, TWSI_CONTROL, val & ~CONTROL_INTEN); 172 cv_broadcast(&sc->sc_cv); 173 mutex_exit(&sc->sc_mtx); 174 return 1; /* handled */ 175 } 176 mutex_exit(&sc->sc_mtx); 177 return 0; 178 } 179 180 static int 181 gttwsi_send_start(void *v, int flags) 182 { 183 struct gttwsi_softc *sc = v; 184 int expect; 185 186 if (sc->sc_started) 187 expect = STAT_RSCT; 188 else 189 expect = STAT_SCT; 190 sc->sc_started = true; 191 return gttwsi_wait(sc, CONTROL_START, expect, 0, flags, "send-start"); 192 } 193 194 static int 195 gttwsi_send_stop(void *v, int flags) 196 { 197 struct gttwsi_softc *sc = v; 198 int retry = TWSI_RETRY_COUNT; 199 uint32_t control, status; 200 201 sc->sc_started = false; 202 203 /* Interrupt is not generated for STAT_NRS. */ 204 control = CONTROL_STOP | CONTROL_TWSIEN; 205 if (sc->sc_iflg_rwc) 206 control |= CONTROL_IFLG; 207 gttwsi_write_4(sc, TWSI_CONTROL, control); 208 while (retry > 0) { 209 if ((status = gttwsi_read_4(sc, TWSI_STATUS)) == STAT_NRS) 210 return 0; 211 retry--; 212 DELAY(TWSI_STAT_DELAY); 213 } 214 215 aprint_error_dev(sc->sc_dev, "send STOP failed, status=0x%02x\n", 216 status); 217 return EWOULDBLOCK; 218 } 219 220 static int 221 gttwsi_initiate_xfer(void *v, i2c_addr_t addr, int flags) 222 { 223 struct gttwsi_softc *sc = v; 224 uint32_t data, expect, alt; 225 int error, read; 226 227 error = gttwsi_send_start(v, flags); 228 if (error) 229 return error; 230 231 read = (flags & I2C_F_READ) != 0; 232 if (read) { 233 expect = STAT_ARBT_AR; 234 alt = STAT_ARBT_ANR; 235 } else { 236 expect = STAT_AWBT_AR; 237 alt = STAT_AWBT_ANR; 238 } 239 240 /* 241 * First byte contains whether this xfer is a read or write. 242 */ 243 data = read; 244 if (addr > 0x7f) { 245 /* 246 * If this is a 10bit request, the first address byte is 247 * 0b11110<b9><b8><r/w>. 248 */ 249 data |= 0xf0 | ((addr & 0x300) >> 7); 250 gttwsi_write_4(sc, TWSI_DATA, data); 251 error = gttwsi_wait(sc, 0, expect, alt, flags, "send-addr-10"); 252 if (error) 253 return error; 254 /* 255 * The first address byte has been sent, now to send 256 * the second one. 257 */ 258 if (read) { 259 expect = STAT_SARBT_AR; 260 alt = STAT_SARBT_ANR; 261 } else { 262 expect = STAT_SAWBT_AR; 263 alt = STAT_SAWBT_ANR; 264 } 265 data = (uint8_t)addr; 266 } else 267 data |= (addr << 1); 268 269 gttwsi_write_4(sc, TWSI_DATA, data); 270 return gttwsi_wait(sc, 0, expect, alt, flags, "send-addr"); 271 } 272 273 static int 274 gttwsi_read_byte(void *v, uint8_t *valp, int flags) 275 { 276 struct gttwsi_softc *sc = v; 277 int error; 278 279 if (flags & I2C_F_LAST) { 280 error = gttwsi_wait(sc, 0, STAT_MRRD_ANT, 0, flags, 281 "read-last-byte"); 282 } else { 283 error = gttwsi_wait(sc, CONTROL_ACK, STAT_MRRD_AT, 0, flags, 284 "read-byte"); 285 } 286 if (!error) 287 *valp = gttwsi_read_4(sc, TWSI_DATA); 288 if ((flags & (I2C_F_LAST | I2C_F_STOP)) == (I2C_F_LAST | I2C_F_STOP)) 289 error = gttwsi_send_stop(sc, flags); 290 return error; 291 } 292 293 static int 294 gttwsi_write_byte(void *v, uint8_t val, int flags) 295 { 296 struct gttwsi_softc *sc = v; 297 int error; 298 299 gttwsi_write_4(sc, TWSI_DATA, val); 300 error = gttwsi_wait(sc, 0, STAT_MTDB_AR, 0, flags, "write-byte"); 301 if (flags & I2C_F_STOP) 302 gttwsi_send_stop(sc, flags); 303 return error; 304 } 305 306 static int 307 gttwsi_wait(struct gttwsi_softc *sc, uint32_t control, uint32_t expect, 308 uint32_t alt, int flags, const char *what) 309 { 310 uint32_t status; 311 int timo, error = 0; 312 313 /* 314 * XXX Interrupt-driven mode seems to be horribly broken, 315 * XXX at least on AllWinner implementations. Force polled 316 * XXX mode for now. 317 */ 318 flags |= I2C_F_POLL; 319 320 DELAY(5); 321 if (!(flags & I2C_F_POLL)) 322 control |= CONTROL_INTEN; 323 if (sc->sc_iflg_rwc) 324 control |= CONTROL_IFLG; 325 mutex_enter(&sc->sc_mtx); 326 gttwsi_write_4(sc, TWSI_CONTROL, control | CONTROL_TWSIEN); 327 328 timo = 0; 329 for (;;) { 330 control = gttwsi_read_4(sc, TWSI_CONTROL); 331 if (control & CONTROL_IFLG) 332 break; 333 if (!(flags & I2C_F_POLL)) { 334 error = cv_timedwait(&sc->sc_cv, &sc->sc_mtx, hz); 335 if (error) { 336 break; 337 } 338 } else { 339 DELAY(TWSI_RETRY_DELAY); 340 if (timo++ > 1000000) /* 1sec */ 341 break; 342 } 343 } 344 if ((control & CONTROL_IFLG) == 0) { 345 /* 346 * error is set by the cv_timedwait() call above in the 347 * non-polled case. 348 */ 349 if (flags & I2C_F_POLL) { 350 error = EWOULDBLOCK; 351 } else { 352 KASSERT(error != 0); 353 } 354 aprint_error_dev(sc->sc_dev, 355 "gttwsi_wait(): %s timeout%s, control=0x%x, error=%d\n", 356 what, (flags & I2C_F_POLL) ? " (polled)" : "", 357 control, error); 358 goto end; 359 } 360 status = gttwsi_read_4(sc, TWSI_STATUS); 361 if (status != expect) { 362 /* 363 * In the case of probing for a device, we are expecting 364 * 2 different status codes: the ACK case (device exists), 365 * or the NACK case (device does not exist). We don't 366 * need to report an error in the later case. 367 */ 368 if (alt != 0 && status != alt) 369 aprint_error_dev(sc->sc_dev, 370 "unexpected status 0x%x: expect 0x%x\n", status, 371 expect); 372 error = EIO; 373 } 374 end: 375 mutex_exit(&sc->sc_mtx); 376 return error; 377 } 378
Indexes created Sat Sep 27 14:09:57 GMT 2025