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      1 /*	$NetBSD: nouveau_nvkm_engine_disp_cursgv100.c,v 1.2 2021/12/18 23:45:35 riastradh Exp $	*/
      2 
      3 /*
      4  * Copyright 2018 Red Hat Inc.
      5  *
      6  * Permission is hereby granted, free of charge, to any person obtaining a
      7  * copy of this software and associated documentation files (the "Software"),
      8  * to deal in the Software without restriction, including without limitation
      9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
     10  * and/or sell copies of the Software, and to permit persons to whom the
     11  * Software is furnished to do so, subject to the following conditions:
     12  *
     13  * The above copyright notice and this permission notice shall be included in
     14  * all copies or substantial portions of the Software.
     15  *
     16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     22  * OTHER DEALINGS IN THE SOFTWARE.
     23  */
     24 #include <sys/cdefs.h>
     25 __KERNEL_RCSID(0, "$NetBSD: nouveau_nvkm_engine_disp_cursgv100.c,v 1.2 2021/12/18 23:45:35 riastradh Exp $");
     26 
     27 #include "channv50.h"
     28 
     29 #include <subdev/timer.h>
     30 
     31 static int
     32 gv100_disp_curs_idle(struct nv50_disp_chan *chan)
     33 {
     34 	struct nvkm_device *device = chan->disp->base.engine.subdev.device;
     35 	const u32 soff = (chan->chid.ctrl - 1) * 0x04;
     36 	nvkm_msec(device, 2000,
     37 		u32 stat = nvkm_rd32(device, 0x610664 + soff);
     38 		if ((stat & 0x00070000) == 0x00040000)
     39 			return 0;
     40 	);
     41 	return -EBUSY;
     42 }
     43 
     44 static void
     45 gv100_disp_curs_intr(struct nv50_disp_chan *chan, bool en)
     46 {
     47 	struct nvkm_device *device = chan->disp->base.engine.subdev.device;
     48 	const u32 mask = 0x00010000 << chan->head;
     49 	const u32 data = en ? mask : 0;
     50 	nvkm_mask(device, 0x611dac, mask, data);
     51 }
     52 
     53 static void
     54 gv100_disp_curs_fini(struct nv50_disp_chan *chan)
     55 {
     56 	struct nvkm_device *device = chan->disp->base.engine.subdev.device;
     57 	const u32 hoff = chan->chid.ctrl * 4;
     58 	nvkm_mask(device, 0x6104e0 + hoff, 0x00000010, 0x00000010);
     59 	gv100_disp_curs_idle(chan);
     60 	nvkm_mask(device, 0x6104e0 + hoff, 0x00000001, 0x00000000);
     61 }
     62 
     63 static int
     64 gv100_disp_curs_init(struct nv50_disp_chan *chan)
     65 {
     66 	struct nvkm_subdev *subdev = &chan->disp->base.engine.subdev;
     67 	struct nvkm_device *device = subdev->device;
     68 	nvkm_wr32(device, 0x6104e0 + chan->chid.ctrl * 4, 0x00000001);
     69 	return gv100_disp_curs_idle(chan);
     70 }
     71 
     72 static const struct nv50_disp_chan_func
     73 gv100_disp_curs = {
     74 	.init = gv100_disp_curs_init,
     75 	.fini = gv100_disp_curs_fini,
     76 	.intr = gv100_disp_curs_intr,
     77 	.user = gv100_disp_chan_user,
     78 };
     79 
     80 int
     81 gv100_disp_curs_new(const struct nvkm_oclass *oclass, void *argv, u32 argc,
     82 		    struct nv50_disp *disp, struct nvkm_object **pobject)
     83 {
     84 	return nv50_disp_curs_new_(&gv100_disp_curs, disp, 73, 73,
     85 				   oclass, argv, argc, pobject);
     86 }
     87