1 /* $NetBSD: bus_defs.h,v 1.2 2019/09/23 16:17:56 skrll Exp $ */ 2 3 /*- 4 * Copyright (c) 1997, 1998, 2000, 2001, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Copyright (c) 1996 Carnegie-Mellon University. 35 * All rights reserved. 36 * 37 * Author: Chris G. Demetriou 38 * 39 * Permission to use, copy, modify and distribute this software and 40 * its documentation is hereby granted, provided that both the copyright 41 * notice and this permission notice appear in all copies of the 42 * software, derivative works or modified versions, and any portions 43 * thereof, and that both notices appear in supporting documentation. 44 * 45 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 46 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 47 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 48 * 49 * Carnegie Mellon requests users of this software to return to 50 * 51 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 52 * School of Computer Science 53 * Carnegie Mellon University 54 * Pittsburgh PA 15213-3890 55 * 56 * any improvements or extensions that they make and grant Carnegie the 57 * rights to redistribute these changes. 58 */ 59 60 #ifndef _HPCSH_BUS_DEFS_H_ 61 #define _HPCSH_BUS_DEFS_H_ 62 63 #ifdef _KERNEL 64 /* 65 * Turn on BUS_SPACE_DEBUG if the global DEBUG option is enabled. 66 */ 67 #if defined(DEBUG) && !defined(BUS_SPACE_DEBUG) 68 #define BUS_SPACE_DEBUG 69 #endif 70 71 #ifdef BUS_SPACE_DEBUG 72 #include <sys/systm.h> /* for printf() prototype */ 73 /* 74 * Macros for checking the aligned-ness of pointers passed to bus 75 * space ops. Strict alignment is required by the Alpha architecture, 76 * and a trap will occur if unaligned access is performed. These 77 * may aid in the debugging of a broken device driver by displaying 78 * useful information about the problem. 79 */ 80 #define __BUS_SPACE_ALIGNED_ADDRESS(p, t) \ 81 ((((u_long)(p)) & (sizeof(t)-1)) == 0) 82 83 #define __BUS_SPACE_ADDRESS_SANITY(p, t, d) \ 84 ({ \ 85 if (__BUS_SPACE_ALIGNED_ADDRESS((p), t) == 0) { \ 86 printf("%s 0x%lx not aligned to %lu bytes %s:%d\n", \ 87 d, (u_long)(p), (u_long)sizeof(t), __FILE__, __LINE__); \ 88 } \ 89 (void) 0; \ 90 }) 91 92 #define BUS_SPACE_ALIGNED_POINTER(p, t) __BUS_SPACE_ALIGNED_ADDRESS(p, t) 93 #else 94 #define __BUS_SPACE_ADDRESS_SANITY(p, t, d) (void) 0 95 #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t) 96 #endif /* BUS_SPACE_DEBUG */ 97 #endif /* _KERNEL */ 98 99 /* 100 * Addresses (in bus space). 101 */ 102 typedef u_long bus_addr_t; 103 typedef u_long bus_size_t; 104 105 #define PRIxBUSADDR "lx" 106 #define PRIxBUSSIZE "lx" 107 #define PRIuBUSSIZE "lu" 108 /* 109 * Access methods for bus space. 110 */ 111 typedef struct hpcsh_bus_space *bus_space_tag_t; 112 typedef u_long bus_space_handle_t; 113 114 #define PRIxBSH "lx" 115 116 struct extent; /* forward declaration */ 117 118 struct hpcsh_bus_space { 119 struct extent *hbs_extent; 120 bus_addr_t hbs_base_addr; 121 122 /* cookie */ 123 void *hbs_cookie; 124 125 int hbs_flags; 126 #define HBS_FLAGS_ALLOCATED (1 < 0) 127 128 /* mapping/unmapping */ 129 int (*hbs_map)(void *, bus_addr_t, bus_size_t, 130 int, bus_space_handle_t *); 131 void (*hbs_unmap)(void *, bus_space_handle_t, 132 bus_size_t); 133 int (*hbs_subregion)(void *, bus_space_handle_t, 134 bus_size_t, bus_size_t, bus_space_handle_t *); 135 136 /* allocation/deallocation */ 137 int (*hbs_alloc)(void *, bus_addr_t, bus_addr_t, 138 bus_size_t, bus_size_t, bus_size_t, int, 139 bus_addr_t *, bus_space_handle_t *); 140 void (*hbs_free)(void *, bus_space_handle_t, 141 bus_size_t); 142 143 /* get kernel virtual address */ 144 void * (*hbs_vaddr)(void *, bus_space_handle_t); 145 146 /* read (single) */ 147 uint8_t (*hbs_r_1)(void *, bus_space_handle_t, 148 bus_size_t); 149 uint16_t (*hbs_r_2)(void *, bus_space_handle_t, 150 bus_size_t); 151 uint32_t (*hbs_r_4)(void *, bus_space_handle_t, 152 bus_size_t); 153 uint64_t (*hbs_r_8)(void *, bus_space_handle_t, 154 bus_size_t); 155 156 /* read multiple */ 157 void (*hbs_rm_1)(void *, bus_space_handle_t, 158 bus_size_t, uint8_t *, bus_size_t); 159 void (*hbs_rm_2)(void *, bus_space_handle_t, 160 bus_size_t, uint16_t *, bus_size_t); 161 void (*hbs_rm_4)(void *, bus_space_handle_t, 162 bus_size_t, uint32_t *, bus_size_t); 163 void (*hbs_rm_8)(void *, bus_space_handle_t, 164 bus_size_t, uint64_t *, bus_size_t); 165 166 /* read region */ 167 void (*hbs_rr_1)(void *, bus_space_handle_t, 168 bus_size_t, uint8_t *, bus_size_t); 169 void (*hbs_rr_2)(void *, bus_space_handle_t, 170 bus_size_t, uint16_t *, bus_size_t); 171 void (*hbs_rr_4)(void *, bus_space_handle_t, 172 bus_size_t, uint32_t *, bus_size_t); 173 void (*hbs_rr_8)(void *, bus_space_handle_t, 174 bus_size_t, uint64_t *, bus_size_t); 175 176 /* write (single) */ 177 void (*hbs_w_1)(void *, bus_space_handle_t, 178 bus_size_t, uint8_t); 179 void (*hbs_w_2)(void *, bus_space_handle_t, 180 bus_size_t, uint16_t); 181 void (*hbs_w_4)(void *, bus_space_handle_t, 182 bus_size_t, uint32_t); 183 void (*hbs_w_8)(void *, bus_space_handle_t, 184 bus_size_t, uint64_t); 185 186 /* write multiple */ 187 void (*hbs_wm_1)(void *, bus_space_handle_t, 188 bus_size_t, const uint8_t *, bus_size_t); 189 void (*hbs_wm_2)(void *, bus_space_handle_t, 190 bus_size_t, const uint16_t *, bus_size_t); 191 void (*hbs_wm_4)(void *, bus_space_handle_t, 192 bus_size_t, const uint32_t *, bus_size_t); 193 void (*hbs_wm_8)(void *, bus_space_handle_t, 194 bus_size_t, const uint64_t *, bus_size_t); 195 196 /* write region */ 197 void (*hbs_wr_1)(void *, bus_space_handle_t, 198 bus_size_t, const uint8_t *, bus_size_t); 199 void (*hbs_wr_2)(void *, bus_space_handle_t, 200 bus_size_t, const uint16_t *, bus_size_t); 201 void (*hbs_wr_4)(void *, bus_space_handle_t, 202 bus_size_t, const uint32_t *, bus_size_t); 203 void (*hbs_wr_8)(void *, bus_space_handle_t, 204 bus_size_t, const uint64_t *, bus_size_t); 205 206 /* set multiple */ 207 void (*hbs_sm_1)(void *, bus_space_handle_t, 208 bus_size_t, uint8_t, bus_size_t); 209 void (*hbs_sm_2)(void *, bus_space_handle_t, 210 bus_size_t, uint16_t, bus_size_t); 211 void (*hbs_sm_4)(void *, bus_space_handle_t, 212 bus_size_t, uint32_t, bus_size_t); 213 void (*hbs_sm_8)(void *, bus_space_handle_t, 214 bus_size_t, uint64_t, bus_size_t); 215 216 /* set region */ 217 void (*hbs_sr_1)(void *, bus_space_handle_t, 218 bus_size_t, uint8_t, bus_size_t); 219 void (*hbs_sr_2)(void *, bus_space_handle_t, 220 bus_size_t, uint16_t, bus_size_t); 221 void (*hbs_sr_4)(void *, bus_space_handle_t, 222 bus_size_t, uint32_t, bus_size_t); 223 void (*hbs_sr_8)(void *, bus_space_handle_t, 224 bus_size_t, uint64_t, bus_size_t); 225 226 /* copy */ 227 void (*hbs_c_1)(void *, bus_space_handle_t, bus_size_t, 228 bus_space_handle_t, bus_size_t, bus_size_t); 229 void (*hbs_c_2)(void *, bus_space_handle_t, bus_size_t, 230 bus_space_handle_t, bus_size_t, bus_size_t); 231 void (*hbs_c_4)(void *, bus_space_handle_t, bus_size_t, 232 bus_space_handle_t, bus_size_t, bus_size_t); 233 void (*hbs_c_8)(void *, bus_space_handle_t, bus_size_t, 234 bus_space_handle_t, bus_size_t, bus_size_t); 235 }; 236 237 #define BUS_SPACE_MAP_CACHEABLE 0x01 238 #define BUS_SPACE_MAP_LINEAR 0x02 239 #define BUS_SPACE_MAP_PREFETCHABLE 0x04 240 241 #define BUS_SPACE_BARRIER_READ 0x01 242 #define BUS_SPACE_BARRIER_WRITE 0x02 243 244 /* 245 * Flags used in various bus DMA methods. 246 */ 247 #define BUS_DMA_WAITOK 0x000 /* safe to sleep (pseudo-flag) */ 248 #define BUS_DMA_NOWAIT 0x001 /* not safe to sleep */ 249 #define BUS_DMA_ALLOCNOW 0x002 /* perform resource allocation now */ 250 #define BUS_DMA_COHERENT 0x004 /* map memory to not require sync */ 251 #define BUS_DMA_STREAMING 0x008 /* hint: sequential, unidirectional */ 252 #define BUS_DMA_BUS1 0x010 /* placeholders for bus functions... */ 253 #define BUS_DMA_BUS2 0x020 254 #define BUS_DMA_BUS3 0x040 255 #define BUS_DMA_BUS4 0x080 256 #define BUS_DMA_READ 0x100 /* mapping is device -> memory only */ 257 #define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */ 258 #define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */ 259 260 /* 261 * Private flags stored in the DMA map. 262 */ 263 #define HPCSH_DMAMAP_COHERENT 0x10000 /* no cache flush necessary on sync */ 264 265 /* Forwards needed by prototypes below. */ 266 struct mbuf; 267 struct uio; 268 269 /* 270 * Operations performed by bus_dmamap_sync(). 271 */ 272 #define BUS_DMASYNC_PREREAD 0x01 273 #define BUS_DMASYNC_POSTREAD 0x02 274 #define BUS_DMASYNC_PREWRITE 0x04 275 #define BUS_DMASYNC_POSTWRITE 0x08 276 277 typedef struct hpcsh_bus_dma_tag *bus_dma_tag_t; 278 typedef struct hpcsh_bus_dmamap *bus_dmamap_t; 279 280 #define BUS_DMA_TAG_VALID(t) ((t) != (bus_dma_tag_t)0) 281 282 /* 283 * bus_dma_segment_t 284 * 285 * Describes a single contiguous DMA transaction. Values 286 * are suitable for programming into DMA registers. 287 */ 288 struct hpcsh_bus_dma_segment { 289 bus_addr_t ds_addr; /* DMA address */ 290 bus_size_t ds_len; /* length of transfer */ 291 bus_addr_t _ds_vaddr; /* virtual address, 0 if invalid */ 292 }; 293 typedef struct hpcsh_bus_dma_segment bus_dma_segment_t; 294 295 /* 296 * bus_dma_tag_t 297 * 298 * A machine-dependent opaque type describing the implementation of 299 * DMA for a given bus. 300 */ 301 302 struct hpcsh_bus_dma_tag { 303 void *_cookie; /* cookie used in the guts */ 304 305 bus_addr_t _wbase; /* DMA window base */ 306 bus_addr_t _physbase; /* physical base of the window */ 307 bus_size_t _wsize; /* size of the window */ 308 309 /* 310 * DMA mapping methods. 311 */ 312 int (*_dmamap_create)(bus_dma_tag_t, bus_size_t, int, 313 bus_size_t, bus_size_t, int, bus_dmamap_t *); 314 void (*_dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t); 315 int (*_dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *, 316 bus_size_t, struct proc *, int); 317 int (*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t, 318 struct mbuf *, int); 319 int (*_dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t, 320 struct uio *, int); 321 int (*_dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t, 322 bus_dma_segment_t *, int, bus_size_t, int); 323 void (*_dmamap_unload)(bus_dma_tag_t, bus_dmamap_t); 324 void (*_dmamap_sync)(bus_dma_tag_t, bus_dmamap_t, 325 bus_addr_t, bus_size_t, int); 326 327 /* 328 * DMA memory utility functions. 329 */ 330 int (*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t, 331 bus_size_t, bus_dma_segment_t *, int, int *, int); 332 void (*_dmamem_free)(bus_dma_tag_t, 333 bus_dma_segment_t *, int); 334 int (*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *, 335 int, size_t, void **, int); 336 void (*_dmamem_unmap)(bus_dma_tag_t, void *, size_t); 337 paddr_t (*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *, 338 int, off_t, int, int); 339 }; 340 341 /* 342 * bus_dmamap_t 343 * 344 * Describes a DMA mapping. 345 */ 346 struct hpcsh_bus_dmamap { 347 /* 348 * PRIVATE MEMBERS: not for use my machine-independent code. 349 */ 350 bus_size_t _dm_size; /* largest DMA transfer mappable */ 351 int _dm_segcnt; /* number of segs this map can map */ 352 bus_size_t _dm_maxmaxsegsz; /* fixed largest possible segment */ 353 bus_size_t _dm_boundary; /* don't cross this */ 354 int _dm_flags; /* misc. flags */ 355 struct vmspace *_dm_vmspace; /* vmspace that owns the mapping */ 356 357 /* 358 * Private cookie to be used by the DMA back-end. 359 */ 360 void *_dm_cookie; 361 362 /* 363 * PUBLIC MEMBERS: these are used by machine-independent code. 364 */ 365 bus_size_t dm_maxsegsz; /* largest possible segment */ 366 bus_size_t dm_mapsize; /* size of the mapping */ 367 int dm_nsegs; /* # valid segments in mapping */ 368 bus_dma_segment_t dm_segs[1]; /* segments; variable length */ 369 }; 370 371 #endif /* _HPCSH_BUS_DEFS_H_ */ 372
Indexes created Sat Sep 20 22:09:52 GMT 2025