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Searched
defs:hw_crtc_timing
(Results
1 - 3
of
3
) sorted by relevancy
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
amdgpu_dce_stream_encoder.c
300
struct dc_crtc_timing
hw_crtc_timing
= *crtc_timing;
local in function:dce110_stream_encoder_dp_set_stream_attribute
301
if (
hw_crtc_timing
.flags.INTERLACE) {
303
hw_crtc_timing
.v_total /= 2;
304
hw_crtc_timing
.v_border_top /= 2;
305
hw_crtc_timing
.v_addressable /= 2;
306
hw_crtc_timing
.v_border_bottom /= 2;
307
hw_crtc_timing
.v_front_porch /= 2;
308
hw_crtc_timing
.v_sync_width /= 2;
311
switch (
hw_crtc_timing
.pixel_encoding) {
320
if (
hw_crtc_timing
.flags.Y_ONLY
[
all
...]
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
amdgpu_dcn10_stream_encoder.c
272
struct dc_crtc_timing
hw_crtc_timing
= *crtc_timing;
local in function:enc1_stream_encoder_dp_set_stream_attribute
274
if (
hw_crtc_timing
.flags.INTERLACE) {
276
hw_crtc_timing
.v_total /= 2;
277
hw_crtc_timing
.v_border_top /= 2;
278
hw_crtc_timing
.v_addressable /= 2;
279
hw_crtc_timing
.v_border_bottom /= 2;
280
hw_crtc_timing
.v_front_porch /= 2;
281
hw_crtc_timing
.v_sync_width /= 2;
286
switch (
hw_crtc_timing
.pixel_encoding) {
293
if (
hw_crtc_timing
.flags.Y_ONLY
[
all
...]
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/
amdgpu_dc.c
1052
struct dc_crtc_timing
hw_crtc_timing
= {0};
local in function:dc_validate_seamless_boot_timing
1094
if (!tg->funcs->get_hw_timing(tg, &
hw_crtc_timing
))
1097
if (crtc_timing->h_total !=
hw_crtc_timing
.h_total)
1100
if (crtc_timing->h_border_left !=
hw_crtc_timing
.h_border_left)
1103
if (crtc_timing->h_addressable !=
hw_crtc_timing
.h_addressable)
1106
if (crtc_timing->h_border_right !=
hw_crtc_timing
.h_border_right)
1109
if (crtc_timing->h_front_porch !=
hw_crtc_timing
.h_front_porch)
1112
if (crtc_timing->h_sync_width !=
hw_crtc_timing
.h_sync_width)
1115
if (crtc_timing->v_total !=
hw_crtc_timing
.v_total)
1118
if (crtc_timing->v_border_top !=
hw_crtc_timing
.v_border_top
[
all
...]
Completed in 13 milliseconds
Indexes created Tue Sep 30 11:09:46 GMT 2025