1 /* $NetBSD: hw_sequencer.h,v 1.2 2021/12/18 23:45:05 riastradh Exp $ */ 2 3 /* 4 * Copyright 2015 Advanced Micro Devices, Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: AMD 25 * 26 */ 27 28 #ifndef __DC_HW_SEQUENCER_H__ 29 #define __DC_HW_SEQUENCER_H__ 30 #include "dc_types.h" 31 #include "clock_source.h" 32 #include "inc/hw/timing_generator.h" 33 #include "inc/hw/opp.h" 34 #include "inc/hw/link_encoder.h" 35 #include "core_status.h" 36 37 enum vline_select { 38 VLINE0, 39 VLINE1 40 }; 41 42 struct pipe_ctx; 43 struct dc_state; 44 struct dc_stream_status; 45 struct dc_writeback_info; 46 struct dchub_init_data; 47 struct dc_static_screen_params; 48 struct resource_pool; 49 struct dc_phy_addr_space_config; 50 struct dc_virtual_addr_space_config; 51 struct dpp; 52 struct dce_hwseq; 53 54 struct hw_sequencer_funcs { 55 /* Embedded Display Related */ 56 void (*edp_power_control)(struct dc_link *link, bool enable); 57 void (*edp_wait_for_hpd_ready)(struct dc_link *link, bool power_up); 58 59 /* Pipe Programming Related */ 60 void (*init_hw)(struct dc *dc); 61 void (*enable_accelerated_mode)(struct dc *dc, 62 struct dc_state *context); 63 enum dc_status (*apply_ctx_to_hw)(struct dc *dc, 64 struct dc_state *context); 65 void (*disable_plane)(struct dc *dc, struct pipe_ctx *pipe_ctx); 66 void (*apply_ctx_for_surface)(struct dc *dc, 67 const struct dc_stream_state *stream, 68 int num_planes, struct dc_state *context); 69 void (*program_front_end_for_ctx)(struct dc *dc, 70 struct dc_state *context); 71 void (*update_plane_addr)(const struct dc *dc, 72 struct pipe_ctx *pipe_ctx); 73 void (*update_dchub)(struct dce_hwseq *hws, 74 struct dchub_init_data *dh_data); 75 void (*wait_for_mpcc_disconnect)(struct dc *dc, 76 struct resource_pool *res_pool, 77 struct pipe_ctx *pipe_ctx); 78 void (*program_triplebuffer)(const struct dc *dc, 79 struct pipe_ctx *pipe_ctx, bool enableTripleBuffer); 80 void (*update_pending_status)(struct pipe_ctx *pipe_ctx); 81 82 /* Pipe Lock Related */ 83 void (*pipe_control_lock_global)(struct dc *dc, 84 struct pipe_ctx *pipe, bool lock); 85 void (*pipe_control_lock)(struct dc *dc, 86 struct pipe_ctx *pipe, bool lock); 87 void (*set_flip_control_gsl)(struct pipe_ctx *pipe_ctx, 88 bool flip_immediate); 89 90 /* Timing Related */ 91 void (*get_position)(struct pipe_ctx **pipe_ctx, int num_pipes, 92 struct crtc_position *position); 93 int (*get_vupdate_offset_from_vsync)(struct pipe_ctx *pipe_ctx); 94 void (*enable_per_frame_crtc_position_reset)(struct dc *dc, 95 int group_size, struct pipe_ctx *grouped_pipes[]); 96 void (*enable_timing_synchronization)(struct dc *dc, 97 int group_index, int group_size, 98 struct pipe_ctx *grouped_pipes[]); 99 void (*setup_periodic_interrupt)(struct dc *dc, 100 struct pipe_ctx *pipe_ctx, 101 enum vline_select vline); 102 void (*set_drr)(struct pipe_ctx **pipe_ctx, int num_pipes, 103 unsigned int vmin, unsigned int vmax, 104 unsigned int vmid, unsigned int vmid_frame_number); 105 void (*set_static_screen_control)(struct pipe_ctx **pipe_ctx, 106 int num_pipes, 107 const struct dc_static_screen_params *events); 108 109 /* Stream Related */ 110 void (*enable_stream)(struct pipe_ctx *pipe_ctx); 111 void (*disable_stream)(struct pipe_ctx *pipe_ctx); 112 void (*blank_stream)(struct pipe_ctx *pipe_ctx); 113 void (*unblank_stream)(struct pipe_ctx *pipe_ctx, 114 struct dc_link_settings *link_settings); 115 116 /* Bandwidth Related */ 117 void (*prepare_bandwidth)(struct dc *dc, struct dc_state *context); 118 bool (*update_bandwidth)(struct dc *dc, struct dc_state *context); 119 void (*optimize_bandwidth)(struct dc *dc, struct dc_state *context); 120 121 /* Infopacket Related */ 122 void (*set_avmute)(struct pipe_ctx *pipe_ctx, bool enable); 123 void (*send_immediate_sdp_message)( 124 struct pipe_ctx *pipe_ctx, 125 const uint8_t *custom_sdp_message, 126 unsigned int sdp_message_size); 127 void (*update_info_frame)(struct pipe_ctx *pipe_ctx); 128 void (*set_dmdata_attributes)(struct pipe_ctx *pipe); 129 void (*program_dmdata_engine)(struct pipe_ctx *pipe_ctx); 130 bool (*dmdata_status_done)(struct pipe_ctx *pipe_ctx); 131 132 /* Cursor Related */ 133 void (*set_cursor_position)(struct pipe_ctx *pipe); 134 void (*set_cursor_attribute)(struct pipe_ctx *pipe); 135 void (*set_cursor_sdr_white_level)(struct pipe_ctx *pipe); 136 137 /* Colour Related */ 138 void (*program_gamut_remap)(struct pipe_ctx *pipe_ctx); 139 void (*program_output_csc)(struct dc *dc, struct pipe_ctx *pipe_ctx, 140 enum dc_color_space colorspace, 141 uint16_t *matrix, int opp_id); 142 143 /* VM Related */ 144 int (*init_sys_ctx)(struct dce_hwseq *hws, 145 struct dc *dc, 146 struct dc_phy_addr_space_config *pa_config); 147 void (*init_vm_ctx)(struct dce_hwseq *hws, 148 struct dc *dc, 149 struct dc_virtual_addr_space_config *va_config, 150 int vmid); 151 152 /* Writeback Related */ 153 void (*update_writeback)(struct dc *dc, 154 struct dc_writeback_info *wb_info, 155 struct dc_state *context); 156 void (*enable_writeback)(struct dc *dc, 157 struct dc_writeback_info *wb_info, 158 struct dc_state *context); 159 void (*disable_writeback)(struct dc *dc, 160 unsigned int dwb_pipe_inst); 161 162 bool (*mmhubbub_warmup)(struct dc *dc, 163 unsigned int num_dwb, 164 struct dc_writeback_info *wb_info); 165 166 /* Clock Related */ 167 enum dc_status (*set_clock)(struct dc *dc, 168 enum dc_clock_type clock_type, 169 uint32_t clk_khz, uint32_t stepping); 170 void (*get_clock)(struct dc *dc, enum dc_clock_type clock_type, 171 struct dc_clock_config *clock_cfg); 172 void (*optimize_pwr_state)(const struct dc *dc, 173 struct dc_state *context); 174 void (*exit_optimized_pwr_state)(const struct dc *dc, 175 struct dc_state *context); 176 177 /* Audio Related */ 178 void (*enable_audio_stream)(struct pipe_ctx *pipe_ctx); 179 void (*disable_audio_stream)(struct pipe_ctx *pipe_ctx); 180 181 /* Stereo 3D Related */ 182 void (*setup_stereo)(struct pipe_ctx *pipe_ctx, struct dc *dc); 183 184 /* HW State Logging Related */ 185 void (*log_hw_state)(struct dc *dc, struct dc_log_buffer_ctx *log_ctx); 186 void (*get_hw_state)(struct dc *dc, char *pBuf, 187 unsigned int bufSize, unsigned int mask); 188 void (*clear_status_bits)(struct dc *dc, unsigned int mask); 189 190 191 }; 192 193 void color_space_to_black_color( 194 const struct dc *dc, 195 enum dc_color_space colorspace, 196 struct tg_color *black_color); 197 198 bool hwss_wait_for_blank_complete( 199 struct timing_generator *tg); 200 201 const uint16_t *find_color_matrix( 202 enum dc_color_space color_space, 203 uint32_t *array_size); 204 205 #endif /* __DC_HW_SEQUENCER_H__ */ 206
Indexes created Sat Sep 20 22:09:52 GMT 2025