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      1 /*	$NetBSD: i915_gem_fence_reg.h,v 1.5 2021/12/19 11:33:49 riastradh Exp $	*/
      2 
      3 /*
      4  * Copyright  2016 Intel Corporation
      5  *
      6  * Permission is hereby granted, free of charge, to any person obtaining a
      7  * copy of this software and associated documentation files (the "Software"),
      8  * to deal in the Software without restriction, including without limitation
      9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
     10  * and/or sell copies of the Software, and to permit persons to whom the
     11  * Software is furnished to do so, subject to the following conditions:
     12  *
     13  * The above copyright notice and this permission notice (including the next
     14  * paragraph) shall be included in all copies or substantial portions of the
     15  * Software.
     16  *
     17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
     21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
     22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
     23  * IN THE SOFTWARE.
     24  *
     25  */
     26 
     27 #ifndef __I915_FENCE_REG_H__
     28 #define __I915_FENCE_REG_H__
     29 
     30 #include <linux/list.h>
     31 #include <linux/types.h>
     32 
     33 struct drm_i915_gem_object;
     34 struct i915_ggtt;
     35 struct i915_vma;
     36 struct intel_gt;
     37 struct sg_table;
     38 
     39 #define I965_FENCE_PAGE 4096UL
     40 
     41 struct i915_fence_reg {
     42 	struct list_head link;
     43 	struct i915_ggtt *ggtt;
     44 	struct i915_vma *vma;
     45 	atomic_t pin_count;
     46 	int id;
     47 	/**
     48 	 * Whether the tiling parameters for the currently
     49 	 * associated fence register have changed. Note that
     50 	 * for the purposes of tracking tiling changes we also
     51 	 * treat the unfenced register, the register slot that
     52 	 * the object occupies whilst it executes a fenced
     53 	 * command (such as BLT on gen2/3), as a "fence".
     54 	 */
     55 	bool dirty;
     56 };
     57 
     58 /* i915_gem_fence_reg.c */
     59 struct i915_fence_reg *i915_reserve_fence(struct i915_ggtt *ggtt);
     60 void i915_unreserve_fence(struct i915_fence_reg *fence);
     61 
     62 void i915_gem_restore_fences(struct i915_ggtt *ggtt);
     63 
     64 void i915_gem_object_do_bit_17_swizzle(struct drm_i915_gem_object *obj,
     65 				       struct sg_table *pages);
     66 void i915_gem_object_save_bit_17_swizzle(struct drm_i915_gem_object *obj,
     67 					 struct sg_table *pages);
     68 
     69 void i915_ggtt_init_fences(struct i915_ggtt *ggtt);
     70 
     71 void intel_gt_init_swizzling(struct intel_gt *gt);
     72 
     73 #endif
     74